Lines Matching refs:instr
129 Instr* pc = reinterpret_cast<Instr*>(pc_);
130 Instr* instr = reinterpret_cast<Instr*>(instructions);
132 *(pc + i) = *(instr + i);
224 const Instr kPopInstruction =
228 const Instr kPushRegPattern =
232 const Instr kPopRegPattern =
235 const Instr kMovLrPc = al | MOV | pc.code() | lr.code() * B12;
237 const Instr kLdrPCMask = kCondMask | 15 * B24 | 7 * B20 | 15 * B16;
238 const Instr kLdrPCPattern = al | 5 * B24 | L | pc.code() * B16;
240 const Instr kBlxRegMask =
242 const Instr kBlxRegPattern =
244 const Instr kMovMvnMask = 0x6d * B21 | 0xf * B16;
245 const Instr kMovMvnPattern = 0xd * B21;
246 const Instr kMovMvnFlip = B22;
247 const Instr kMovLeaveCCMask = 0xdff * B16;
248 const Instr kMovLeaveCCPattern = 0x1a0 * B16;
249 const Instr kMovwMask = 0xff * B20;
250 const Instr kMovwPattern = 0x30 * B20;
251 const Instr kMovwLeaveCCFlip = 0x5 * B21;
252 const Instr kCmpCmnMask = 0xdd * B20 | 0xf * B12;
253 const Instr kCmpCmnPattern = 0x15 * B20;
254 const Instr kCmpCmnFlip = B21;
255 const Instr kAddSubFlip = 0x6 * B21;
256 const Instr kAndBicFlip = 0xe * B21;
259 const Instr kLdrRegFpOffsetPattern =
261 const Instr kStrRegFpOffsetPattern =
263 const Instr kLdrRegFpNegOffsetPattern =
265 const Instr kStrRegFpNegOffsetPattern =
267 const Instr kLdrStrInstrTypeMask = 0xffff0000;
268 const Instr kLdrStrInstrArgumentMask = 0x0000ffff;
269 const Instr kLdrStrOffsetMask = 0x00000fff;
361 Condition Assembler::GetCondition(Instr instr) {
362 return Instruction::ConditionField(instr);
366 bool Assembler::IsBranch(Instr instr) {
367 return (instr & (B27 | B25)) == (B27 | B25);
371 int Assembler::GetBranchOffset(Instr instr) {
372 ASSERT(IsBranch(instr));
375 return ((instr & kImm24Mask) << 8) >> 6;
379 bool Assembler::IsLdrRegisterImmediate(Instr instr) {
380 return (instr & (B27 | B26 | B25 | B22 | B20)) == (B26 | B20);
384 int Assembler::GetLdrRegisterImmediateOffset(Instr instr) {
385 ASSERT(IsLdrRegisterImmediate(instr));
386 bool positive = (instr & B23) == B23;
387 int offset = instr & kOff12Mask; // Zero extended offset.
392 Instr Assembler::SetLdrRegisterImmediateOffset(Instr instr, int offset) {
393 ASSERT(IsLdrRegisterImmediate(instr));
398 instr = (instr & ~B23) | (positive ? B23 : 0);
400 return (instr & ~kOff12Mask) | offset;
404 bool Assembler::IsStrRegisterImmediate(Instr instr) {
405 return (instr & (B27 | B26 | B25 | B22 | B20)) == B26;
409 Instr Assembler::SetStrRegisterImmediateOffset(Instr instr, int offset) {
410 ASSERT(IsStrRegisterImmediate(instr));
415 instr = (instr & ~B23) | (positive ? B23 : 0);
417 return (instr & ~kOff12Mask) | offset;
421 bool Assembler::IsAddRegisterImmediate(Instr instr) {
422 return (instr & (B27 | B26 | B25 | B24 | B23 | B22 | B21)) == (B25 | B23);
426 Instr Assembler::SetAddRegisterImmediateOffset(Instr instr, int offset) {
427 ASSERT(IsAddRegisterImmediate(instr));
431 return (instr & ~kOff12Mask) | offset;
435 Register Assembler::GetRd(Instr instr) {
437 reg.code_ = Instruction::RdValue(instr);
442 Register Assembler::GetRn(Instr instr) {
444 reg.code_ = Instruction::RnValue(instr);
449 Register Assembler::GetRm(Instr instr) {
451 reg.code_ = Instruction::RmValue(instr);
456 bool Assembler::IsPush(Instr instr) {
457 return ((instr & ~kRdMask) == kPushRegPattern);
461 bool Assembler::IsPop(Instr instr) {
462 return ((instr & ~kRdMask) == kPopRegPattern);
466 bool Assembler::IsStrRegFpOffset(Instr instr) {
467 return ((instr & kLdrStrInstrTypeMask) == kStrRegFpOffsetPattern);
471 bool Assembler::IsLdrRegFpOffset(Instr instr) {
472 return ((instr & kLdrStrInstrTypeMask) == kLdrRegFpOffsetPattern);
476 bool Assembler::IsStrRegFpNegOffset(Instr instr) {
477 return ((instr & kLdrStrInstrTypeMask) == kStrRegFpNegOffsetPattern);
481 bool Assembler::IsLdrRegFpNegOffset(Instr instr) {
482 return ((instr & kLdrStrInstrTypeMask) == kLdrRegFpNegOffsetPattern);
486 bool Assembler::IsLdrPcImmediateOffset(Instr instr) {
489 return (instr & (kLdrPCMask & ~kCondMask)) == 0x051f0000;
493 bool Assembler::IsTstImmediate(Instr instr) {
494 return (instr & (B27 | B26 | I | kOpCodeMask | S | kRdMask)) ==
499 bool Assembler::IsCmpRegister(Instr instr) {
500 return (instr & (B27 | B26 | I | kOpCodeMask | S | kRdMask | B4)) ==
505 bool Assembler::IsCmpImmediate(Instr instr) {
506 return (instr & (B27 | B26 | I | kOpCodeMask | S | kRdMask)) ==
511 Register Assembler::GetCmpImmediateRegister(Instr instr) {
512 ASSERT(IsCmpImmediate(instr));
513 return GetRn(instr);
517 int Assembler::GetCmpImmediateRawImmediate(Instr instr) {
518 ASSERT(IsCmpImmediate(instr));
519 return instr & kOff12Mask;
538 Instr instr = instr_at(pos);
539 if ((instr & ~kImm24Mask) == 0) {
541 return instr - (Code::kHeaderSize - kHeapObjectTag);
543 ASSERT((instr & 7*B25) == 5*B25); // b, bl, or blx imm24
544 int imm26 = ((instr & kImm24Mask) << 8) >> 6;
545 if ((Instruction::ConditionField(instr) == kSpecialCondition) &&
546 ((instr & B24) != 0)) {
555 Instr instr = instr_at(pos);
556 if ((instr & ~kImm24Mask) == 0) {
564 ASSERT((instr & 7*B25) == 5*B25); // b, bl, or blx imm24
565 if (Instruction::ConditionField(instr) == kSpecialCondition) {
568 instr = (instr & ~(B24 | kImm24Mask)) | ((imm26 & 2) >> 1)*B24;
571 instr &= ~kImm24Mask;
575 instr_at_put(pos, instr | (imm24 & kImm24Mask));
589 Instr instr = instr_at(l.pos());
590 if ((instr & ~kImm24Mask) == 0) {
593 ASSERT((instr & 7*B25) == 5*B25); // b, bl, or blx
594 Condition cond = Instruction::ConditionField(instr);
601 if ((instr & B24) != 0)
692 static Instr EncodeMovwImmediate(uint32_t immediate) {
705 Instr* instr) {
717 if (instr != NULL) {
718 if ((*instr & kMovMvnMask) == kMovMvnPattern) {
720 *instr ^= kMovMvnFlip;
722 } else if ((*instr & kMovLeaveCCMask) == kMovLeaveCCPattern) {
725 *instr ^= kMovwLeaveCCFlip;
726 *instr |= EncodeMovwImmediate(imm32);
732 } else if ((*instr & kCmpCmnMask) == kCmpCmnPattern) {
734 *instr ^= kCmpCmnFlip;
738 Instr alu_insn = (*instr & kALUMask);
742 *instr ^= kAddSubFlip;
748 *instr ^= kAndBicFlip;
777 bool Operand::is_single_instruction(Instr instr) const {
781 !fits_shifter(imm32_, &dummy1, &dummy2, &instr)) {
785 if ((instr & ~kCondMask) == 13*B21) { // mov, S not set
810 void Assembler::addrmod1(Instr instr,
815 ASSERT((instr & ~(kCondMask | kOpCodeMask | S)) == 0);
821 !fits_shifter(x.imm32_, &rotate_imm, &immed_8, &instr)) {
827 Condition cond = Instruction::ConditionField(instr);
828 if ((instr & ~kCondMask) == 13*B21) { // mov, S not set
842 (instr & kMovMvnMask) != kMovMvnPattern) {
848 addrmod1(instr, rn, rd, Operand(ip));
852 instr |= I | rotate_imm*B8 | immed_8;
855 instr |= x.shift_imm_*B7 | x.shift_op_ | x.rm_.code();
859 instr |= x.rs_.code()*B8 | x.shift_op_ | B4 | x.rm_.code();
861 emit(instr | rn.code()*B16 | rd.code()*B12);
869 void Assembler::addrmod2(Instr instr, Register rd, const MemOperand& x) {
870 ASSERT((instr & ~(kCondMask | B | L)) == B26);
882 ASSERT(!x.rn_.is(ip) && ((instr & L) == L || !rd.is(ip)));
883 mov(ip, Operand(x.offset_), LeaveCC, Instruction::ConditionField(instr));
884 addrmod2(instr, rd, MemOperand(x.rn_, ip, x.am_));
888 instr |= offset_12;
894 instr |= B25 | x.shift_imm_*B7 | x.shift_op_ | x.rm_.code();
897 emit(instr | am | x.rn_.code()*B16 | rd.code()*B12);
901 void Assembler::addrmod3(Instr instr, Register rd, const MemOperand& x) {
902 ASSERT((instr & ~(kCondMask | L | S6 | H)) == (B4 | B7));
915 ASSERT(!x.rn_.is(ip) && ((instr & L) == L || !rd.is(ip)));
916 mov(ip, Operand(x.offset_), LeaveCC, Instruction::ConditionField(instr));
917 addrmod3(instr, rd, MemOperand(x.rn_, ip, x.am_));
921 instr |= B | (offset_8 >> 4)*B8 | (offset_8 & 0xf);
925 ASSERT(!x.rn_.is(ip) && ((instr & L) == L || !rd.is(ip)));
927 Instruction::ConditionField(instr));
928 addrmod3(instr, rd, MemOperand(x.rn_, ip, x.am_));
933 instr |= x.rm_.code();
936 emit(instr | am | x.rn_.code()*B16 | rd.code()*B12);
940 void Assembler::addrmod4(Instr instr, Register rn, RegList rl) {
941 ASSERT((instr & ~(kCondMask | P | U | W | L)) == B27);
944 emit(instr | rn.code()*B16 | rl);
948 void Assembler::addrmod5(Instr instr, CRegister crd, const MemOperand& x) {
951 (instr & ~(kCondMask | kCoprocessorMask | P | U | N | W | L)));
969 emit(instr | am | x.rn_.code()*B16 | crd.code()*B12 | offset_8);
1375 Instr instr;
1388 instr = I | rotate_imm*B8 | immed_8;
1391 instr = src.rm_.code();
1393 emit(cond | instr | B24 | B21 | fields | 15*B12);
1411 Instr push_instr = instr_at(pc_ - 2 * kInstrSize);
1412 Instr pop_instr = instr_at(pc_ - 1 * kInstrSize);
1441 Instr str_instr = instr_at(pc_ - 2 * kInstrSize);
1442 Instr ldr_instr = instr_at(pc_ - 1 * kInstrSize);
1489 Instr mem_write_instr = instr_at(pc_ - 3 * kInstrSize);
1490 Instr ldr_instr = instr_at(pc_ - 2 * kInstrSize);
1491 Instr mem_read_instr = instr_at(pc_ - 1 * kInstrSize);
1690 emit(reinterpret_cast<Instr>(msg));
2331 static Instr EncodeVCVT(const VFPType dst_type,
2581 bool Assembler::IsNop(Instr instr, int type) {
2584 return instr == (al | 13*B21 | type*B12 | type);
2807 Instr instr = instr_at(rinfo.pc());
2811 ASSERT((instr & (7*B25 | P | U | B | W | 15*B16 | kOff12Mask)) ==
2814 ASSERT(delta >= -4); // instr could be ldr pc, [pc, #-4] followed by targ32
2816 instr &= ~U;
2820 instr_at_put(rinfo.pc(), instr + delta);
