Lines Matching refs:dst
756 void and_(Register dst, Register src1, const Operand& src2,
759 void eor(Register dst, Register src1, const Operand& src2,
762 void sub(Register dst, Register src1, const Operand& src2,
764 void sub(Register dst, Register src1, Register src2,
766 sub(dst, src1, Operand(src2), s, cond);
769 void rsb(Register dst, Register src1, const Operand& src2,
772 void add(Register dst, Register src1, const Operand& src2,
774 void add(Register dst, Register src1, Register src2,
776 add(dst, src1, Operand(src2), s, cond);
779 void adc(Register dst, Register src1, const Operand& src2,
782 void sbc(Register dst, Register src1, const Operand& src2,
785 void rsc(Register dst, Register src1, const Operand& src2,
803 void orr(Register dst, Register src1, const Operand& src2,
805 void orr(Register dst, Register src1, Register src2,
807 orr(dst, src1, Operand(src2), s, cond);
810 void mov(Register dst, const Operand& src,
812 void mov(Register dst, Register src, SBit s = LeaveCC, Condition cond = al) {
813 mov(dst, Operand(src), s, cond);
823 void bic(Register dst, Register src1, const Operand& src2,
826 void mvn(Register dst, const Operand& src,
831 void mla(Register dst, Register src1, Register src2, Register srcA,
834 void mul(Register dst, Register src1, Register src2,
851 void clz(Register dst, Register src, Condition cond = al); // v5 and above
859 // usat dst, #satpos, src
860 // usat dst, #satpos, src, lsl #sh
861 // usat dst, #satpos, src, asr #sh
863 // Register dst will contain:
870 void usat(Register dst, int satpos, const Operand& src, Condition cond = al);
874 void ubfx(Register dst, Register src, int lsb, int width,
877 void sbfx(Register dst, Register src, int lsb, int width,
880 void bfc(Register dst, int lsb, int width, Condition cond = al);
882 void bfi(Register dst, Register src, int lsb, int width,
887 void mrs(Register dst, SRegister s, Condition cond = al);
891 void ldr(Register dst, const MemOperand& src, Condition cond = al);
892 void str(Register src, const MemOperand& dst, Condition cond = al);
893 void ldrb(Register dst, const MemOperand& src, Condition cond = al);
894 void strb(Register src, const MemOperand& dst, Condition cond = al);
895 void ldrh(Register dst, const MemOperand& src, Condition cond = al);
896 void strh(Register src, const MemOperand& dst, Condition cond = al);
897 void ldrsb(Register dst, const MemOperand& src, Condition cond = al);
898 void ldrsh(Register dst, const MemOperand& src, Condition cond = al);
904 const MemOperand& dst, Condition cond = al);
907 void ldm(BlockAddrMode am, Register base, RegList dst, Condition cond = al);
960 void vldr(const DwVfpRegister dst,
964 void vldr(const DwVfpRegister dst,
968 void vldr(const SwVfpRegister dst,
972 void vldr(const SwVfpRegister dst,
981 const MemOperand& dst,
989 const MemOperand& dst,
1016 void vmov(const DwVfpRegister dst,
1019 void vmov(const SwVfpRegister dst,
1022 void vmov(const DwVfpRegister dst,
1025 void vmov(const DwVfpRegister dst,
1033 void vmov(const SwVfpRegister dst,
1036 void vmov(const Register dst,
1039 void vcvt_f64_s32(const DwVfpRegister dst,
1043 void vcvt_f32_s32(const SwVfpRegister dst,
1047 void vcvt_f64_u32(const DwVfpRegister dst,
1051 void vcvt_s32_f64(const SwVfpRegister dst,
1055 void vcvt_u32_f64(const SwVfpRegister dst,
1059 void vcvt_f64_f32(const DwVfpRegister dst,
1063 void vcvt_f32_f64(const SwVfpRegister dst,
1068 void vneg(const DwVfpRegister dst,
1071 void vabs(const DwVfpRegister dst,
1074 void vadd(const DwVfpRegister dst,
1078 void vsub(const DwVfpRegister dst,
1082 void vmul(const DwVfpRegister dst,
1086 void vdiv(const DwVfpRegister dst,
1096 void vmrs(const Register dst,
1098 void vmsr(const Register dst,
1100 void vsqrt(const DwVfpRegister dst,
1126 void pop(Register dst, Condition cond = al) {
1127 ldr(dst, MemOperand(sp, 4, PostIndex), cond);
