Home | History | Annotate | Download | only in mips

Lines Matching refs:GenInstrRegister

622 void Assembler::GenInstrRegister(Opcode opcode,
635 void Assembler::GenInstrRegister(Opcode opcode,
648 void Assembler::GenInstrRegister(Opcode opcode,
662 void Assembler::GenInstrRegister(Opcode opcode,
676 void Assembler::GenInstrRegister(Opcode opcode,
951 GenInstrRegister(SPECIAL, rs, zero_reg, zero_reg, 0, JR);
966 GenInstrRegister(SPECIAL, rs, zero_reg, rd, 0, JALR);
976 GenInstrRegister(SPECIAL, rs, rt, rd, 0, ADDU);
1137 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SUBU);
1142 GenInstrRegister(SPECIAL2, rs, rt, rd, 0, MUL);
1147 GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, MULT);
1152 GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, MULTU);
1157 GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, DIV);
1162 GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, DIVU);
1169 GenInstrRegister(SPECIAL, rs, rt, rd, 0, AND);
1179 GenInstrRegister(SPECIAL, rs, rt, rd, 0, OR);
1189 GenInstrRegister(SPECIAL, rs, rt, rd, 0, XOR);
1199 GenInstrRegister(SPECIAL, rs, rt, rd, 0, NOR);
1213 GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa, SLL);
1218 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SLLV);
1223 GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa, SRL);
1228 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SRLV);
1233 GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa, SRA);
1238 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SRAV);
1505 GenInstrRegister(SPECIAL, zero_reg, zero_reg, rd, 0, MFHI);
1510 GenInstrRegister(SPECIAL, zero_reg, zero_reg, rd, 0, MFLO);
1516 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SLT);
1521 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SLTU);
1537 GenInstrRegister(SPECIAL, rs, rt, rd, 0, MOVZ);
1542 GenInstrRegister(SPECIAL, rs, rt, rd, 0, MOVN);
1549 GenInstrRegister(SPECIAL, rs, rt, rd, 0, MOVCI);
1556 GenInstrRegister(SPECIAL, rs, rt, rd, 0, MOVCI);
1563 GenInstrRegister(SPECIAL2, rs, rd, rd, 0, CLZ);
1571 GenInstrRegister(SPECIAL3, rs, rt, pos + size - 1, pos, INS);
1579 GenInstrRegister(SPECIAL3, rs, rt, size - 1, pos, EXT);
1617 GenInstrRegister(COP1, MTC1, rt, fs, f0);
1622 GenInstrRegister(COP1, MFC1, rt, fs, f0);
1627 GenInstrRegister(COP1, CTC1, rt, fs);
1632 GenInstrRegister(COP1, CFC1, rt, fs);
1639 GenInstrRegister(COP1, D, ft, fs, fd, ADD_D);
1644 GenInstrRegister(COP1, D, ft, fs, fd, SUB_D);
1649 GenInstrRegister(COP1, D, ft, fs, fd, MUL_D);
1654 GenInstrRegister(COP1, D, ft, fs, fd, DIV_D);
1659 GenInstrRegister(COP1, D, f0, fs, fd, ABS_D);
1664 GenInstrRegister(COP1, D, f0, fs, fd, MOV_D);
1669 GenInstrRegister(COP1, D, f0, fs, fd, NEG_D);
1674 GenInstrRegister(COP1, D, f0, fs, fd, SQRT_D);
1681 GenInstrRegister(COP1, S, f0, fs, fd, CVT_W_S);
1686 GenInstrRegister(COP1, D, f0, fs, fd, CVT_W_D);
1691 GenInstrRegister(COP1, S, f0, fs, fd, TRUNC_W_S);
1696 GenInstrRegister(COP1, D, f0, fs, fd, TRUNC_W_D);
1701 GenInstrRegister(COP1, S, f0, fs, fd, ROUND_W_S);
1706 GenInstrRegister(COP1, D, f0, fs, fd, ROUND_W_D);
1711 GenInstrRegister(COP1, S, f0, fs, fd, FLOOR_W_S);
1716 GenInstrRegister(COP1, D, f0, fs, fd, FLOOR_W_D);
1721 GenInstrRegister(COP1, S, f0, fs, fd, CEIL_W_S);
1726 GenInstrRegister(COP1, D, f0, fs, fd, CEIL_W_D);
1732 GenInstrRegister(COP1, S, f0, fs, fd, CVT_L_S);
1738 GenInstrRegister(COP1, D, f0, fs, fd, CVT_L_D);
1744 GenInstrRegister(COP1, S, f0, fs, fd, TRUNC_L_S);
1750 GenInstrRegister(COP1, D, f0, fs, fd, TRUNC_L_D);
1755 GenInstrRegister(COP1, S, f0, fs, fd, ROUND_L_S);
1760 GenInstrRegister(COP1, D, f0, fs, fd, ROUND_L_D);
1765 GenInstrRegister(COP1, S, f0, fs, fd, FLOOR_L_S);
1770 GenInstrRegister(COP1, D, f0, fs, fd, FLOOR_L_D);
1775 GenInstrRegister(COP1, S, f0, fs, fd, CEIL_L_S);
1780 GenInstrRegister(COP1, D, f0, fs, fd, CEIL_L_D);
1785 GenInstrRegister(COP1, W, f0, fs, fd, CVT_S_W);
1791 GenInstrRegister(COP1, L, f0, fs, fd, CVT_S_L);
1796 GenInstrRegister(COP1, D, f0, fs, fd, CVT_S_D);
1801 GenInstrRegister(COP1, W, f0, fs, fd, CVT_D_W);
1807 GenInstrRegister(COP1, L, f0, fs, fd, CVT_D_L);
1812 GenInstrRegister(COP1, S, f0, fs, fd, CVT_D_S);