Lines Matching full:lanes
515 /* Lanes of vector registers are always numbered from zero being the
6866 /* All lanes SSE binary operation, G = G `op` E. */
6874 /* All lanes SSE binary operation, G = (not G) `op` E. */
6954 /* All lanes unary SSE operation, G = op(E). */
7535 values (aa,bb), computes, for each of the 4 16-bit lanes:
8887 /* Use t0 .. t3 to hold the 4 original 16-bit lanes of the
8965 /* 0F D7 = PMOVMSKB -- extract sign bits from each of 8 lanes in
10815 /* 66 0F D7 = PMOVMSKB -- extract sign bits from each of 16 lanes in
10864 /* 0F F4 = PMULUDQ -- unsigned widening multiply of 32-lanes 0 x
10896 /* 66 0F F4 = PMULUDQ -- unsigned widening multiply of 32-lanes 0 x
10897 0 to form lower 64-bit half and lanes 2 x 2 to form upper 64-bit
11549 duplicating some lanes (2:2:0:0). */
11551 duplicating some lanes (3:3:1:1). */
11584 duplicating some lanes (0:1:0:1). */
12466 /* permute the lanes */
12472 /* mask off lanes which have (index & 0x80) == 0x80 */
