Lines Matching refs:env
60 GPR11 if mode64: not used - calls by ptr / env ptr for some langs
276 static HReg lookupIRTemp ( ISelEnv* env, IRTemp tmp )
279 vassert(tmp < env->n_vregmap);
280 return env->vregmap[tmp];
284 ISelEnv* env, IRTemp tmp )
286 vassert(!env->mode64);
288 vassert(tmp < env->n_vregmap);
289 vassert(env->vregmapHI[tmp] != INVALID_HREG);
290 *vrLO = env->vregmap[tmp];
291 *vrHI = env->vregmapHI[tmp];
294 static void addInstr ( ISelEnv* env, PPCInstr* instr )
296 addHInstr(env->code, instr);
298 ppPPCInstr(instr, env->mode64);
303 static HReg newVRegI ( ISelEnv* env )
305 HReg reg = mkHReg(env->vreg_ctr, HRcGPR(env->mode64),
307 env->vreg_ctr++;
311 static HReg newVRegF ( ISelEnv* env )
313 HReg reg = mkHReg(env->vreg_ctr, HRcFlt64, True/*virtual reg*/);
314 env->vreg_ctr++;
318 static HReg newVRegV ( ISelEnv* env )
320 HReg reg = mkHReg(env->vreg_ctr, HRcVec128, True/*virtual reg*/);
321 env->vreg_ctr++;
343 static HReg iselWordExpr_R_wrk ( ISelEnv* env, IRExpr* e );
344 static HReg iselWordExpr_R ( ISelEnv* env, IRExpr* e );
355 static PPCRH* iselWordExpr_RH_wrk ( ISelEnv* env,
357 static PPCRH* iselWordExpr_RH ( ISelEnv* env,
362 static PPCRI* iselWordExpr_RI_wrk ( ISelEnv* env, IRExpr* e );
363 static PPCRI* iselWordExpr_RI ( ISelEnv* env, IRExpr* e );
368 static PPCRH* iselWordExpr_RH5u_wrk ( ISelEnv* env, IRExpr* e );
369 static PPCRH* iselWordExpr_RH5u ( ISelEnv* env, IRExpr* e );
374 static PPCRH* iselWordExpr_RH6u_wrk ( ISelEnv* env, IRExpr* e );
375 static PPCRH* iselWordExpr_RH6u ( ISelEnv* env, IRExpr* e );
388 static PPCAMode* iselWordExpr_AMode_wrk ( ISelEnv* env, IRExpr* e, IRType xferTy );
389 static PPCAMode* iselWordExpr_AMode ( ISelEnv* env, IRExpr* e, IRType xferTy );
393 ISelEnv* env, IRExpr* e );
395 ISelEnv* env, IRExpr* e );
399 ISelEnv* env, IRExpr* e );
401 ISelEnv* env, IRExpr* e );
403 static PPCCondCode iselCondCode_wrk ( ISelEnv* env, IRExpr* e );
404 static PPCCondCode iselCondCode ( ISelEnv* env, IRExpr* e );
406 static HReg iselDblExpr_wrk ( ISelEnv* env, IRExpr* e );
407 static HReg iselDblExpr ( ISelEnv* env, IRExpr* e );
409 static HReg iselFltExpr_wrk ( ISelEnv* env, IRExpr* e );
410 static HReg iselFltExpr ( ISelEnv* env, IRExpr* e );
412 static HReg iselVecExpr_wrk ( ISelEnv* env, IRExpr* e );
413 static HReg iselVecExpr ( ISelEnv* env, IRExpr* e );
432 static void add_to_sp ( ISelEnv* env, UInt n )
434 HReg sp = StackFramePtr(env->mode64);
436 addInstr(env, PPCInstr_Alu( Palu_ADD, sp, sp,
440 static void sub_from_sp ( ISelEnv* env, UInt n )
442 HReg sp = StackFramePtr(env->mode64);
444 addInstr(env, PPCInstr_Alu( Palu_SUB, sp, sp,
454 static HReg get_sp_aligned16 ( ISelEnv* env )
456 HReg r = newVRegI(env);
457 HReg align16 = newVRegI(env);
458 addInstr(envenv->mode64)));
460 addInstr(env, PPCInstr_Alu( Palu_ADD, r, r,
463 addInstr(env,
464 PPCInstr_LI(align16, 0xFFFFFFFFFFFFFFF0ULL, env->mode64));
465 addInstr(env, PPCInstr_Alu(Palu_AND, r,r, PPCRH_Reg(align16)));
472 static HReg mk_LoadRR32toFPR ( ISelEnv* env,
475 HReg fr_dst = newVRegF(env);
478 vassert(!env->mode64);
482 sub_from_sp( env, 16 ); // Move SP down 16 bytes
483 am_addr0 = PPCAMode_IR( 0, StackFramePtr(env->mode64) );
484 am_addr1 = PPCAMode_IR( 4, StackFramePtr(env->mode64) );
487 addInstr(env, PPCInstr_Store( 4, am_addr0, r_srcHi, env->mode64 ));
488 addInstr(env, PPCInstr_Store( 4, am_addr1, r_srcLo, env->mode64 ));
491 addInstr(env, PPCInstr_FpLdSt(True/*load*/, 8, fr_dst, am_addr0));
493 add_to_sp( env, 16 ); // Reset SP
498 static HReg mk_LoadR64toFPR ( ISelEnv* env, HReg r_src )
500 HReg fr_dst = newVRegF(env);
503 vassert(env->mode64);
506 sub_from_sp( env, 16 ); // Move SP down 16 bytes
507 am_addr0 = PPCAMode_IR( 0, StackFramePtr(env->mode64) );
510 addInstr(env, PPCInstr_Store( 8, am_addr0, r_src, env->mode64 ));
513 addInstr(env, PPCInstr_FpLdSt(True/*load*/, 8, fr_dst, am_addr0));
515 add_to_sp( env, 16 ); // Reset SP
523 static PPCAMode* advance4 ( ISelEnv* env, PPCAMode* am )
540 PPCAMode* genGuestArrayOffset ( ISelEnv* env, IRRegArray* descr,
573 roff = iselWordExpr_R(env, off);
574 rtmp = newVRegI(env);
575 addInstr(env, PPCInstr_Alu(
579 addInstr(env, PPCInstr_Alu(
583 addInstr(env, PPCInstr_Shft(
585 env->mode64 ? False : True/*F:64-bit, T:32-bit shift*/,
588 addInstr(env, PPCInstr_Alu(
593 PPCAMode_RR( GuestStatePtr(env->mode64), rtmp );
623 void doHelperCall ( ISelEnv* env,
634 Bool mode64 = env->mode64;
639 = (!mode64) && env->vbi->host_ppc32_regalign_int64_args;
749 addInstr(env, mk_iMOVds_RR( argregs[argreg],
756 vassert(typeOfIRExpr(env->type_env, args[i]) == Ity_I32 ||
757 typeOfIRExpr(env->type_env, args[i]) == Ity_I64);
759 if (typeOfIRExpr(env->type_env, args[i]) == Ity_I32) {
761 addInstr(env,
763 iselWordExpr_R(env, args[i]) ));
770 iselInt64Expr(&rHi,&rLo, env, args[i]);
772 addInstr(env, mk_iMOVds_RR( argregs[argreg++], rHi ));
774 addInstr(env, mk_iMOVds_RR( argregs[argreg], rLo));
778 addInstr(env, mk_iMOVds_RR( argregs[argreg],
779 iselWordExpr_R(env, args[i]) ));
795 tmpregs[argreg] = newVRegI(env);
796 addInstr(env, mk_iMOVds_RR( tmpregs[argreg],
803 vassert(typeOfIRExpr(env->type_env, args[i]) == Ity_I32 ||
804 typeOfIRExpr(env->type_env, args[i]) == Ity_I64);
806 if (typeOfIRExpr(env->type_env, args[i]) == Ity_I32) {
807 tmpregs[argreg] = iselWordExpr_R(env, args[i]);
814 iselInt64Expr(&rHi,&rLo, env, args[i]);
819 tmpregs[argreg] = iselWordExpr_R(env, args[i]);
835 cc = iselCondCode( env, guard );
846 addInstr( env, mk_iMOVds_RR( argregs[i], tmpregs[i] ) );
855 addInstr(env, PPCInstr_Call( cc, (Addr64)target, argiregs ));
865 //void set_FPU_rounding_default ( ISelEnv* env )
867 // HReg fr_src = newVRegF(env);
868 // HReg r_src = newVRegI(env);
875 // addInstr(env, PPCInstr_LI(r_src, 0x0, env->mode64));
876 // if (env->mode64) {
877 // fr_src = mk_LoadR64toFPR( env, r_src ); // 1*I64 -> F64
879 // fr_src = mk_LoadRR32toFPR( env, r_src, r_src ); // 2*I32 -> F64
881 // addInstr(env, PPCInstr_FpLdFPSCR( fr_src ));
885 static HReg roundModeIRtoPPC ( ISelEnv* env, HReg r_rmIR )
895 HReg r_rmPPC = newVRegI(env);
896 HReg r_tmp1 = newVRegI(env);
898 vassert(hregClass(r_rmIR) == HRcGPR(env->mode64));
906 addInstr(env, PPCInstr_Shft(Pshft_SHL, True/*32bit shift*/,
909 addInstr(env, PPCInstr_Alu( Palu_XOR, r_tmp1, r_rmIR,
912 addInstr(env, PPCInstr_Alu( Palu_AND, r_rmPPC, r_tmp1,
930 env->previous_rm.) If 'mode' is a single IR temporary 't' and
931 env->previous_rm is also just 't', then the setting is skipped.
947 void set_FPU_rounding_mode ( ISelEnv* env, IRExpr* mode )
949 HReg fr_src = newVRegF(env);
952 vassert(typeOfIRExpr(env->type_env,mode) == Ity_I32);
955 if (env->previous_rm
956 && env->previous_rm->tag == Iex_RdTmp
958 && env->previous_rm->Iex.RdTmp.tmp == mode->Iex.RdTmp.tmp) {
960 vassert(typeOfIRExpr(env->type_env, env->previous_rm) == Ity_I32);
965 env->previous_rm = mode;
971 r_src = roundModeIRtoPPC( env, iselWordExpr_R(env, mode) );
973 if (env->mode64) {
974 fr_src = mk_LoadR64toFPR( env, r_src ); // 1*I64 -> F64
976 fr_src = mk_LoadRR32toFPR( env, r_src, r_src ); // 2*I32 -> F64
980 addInstr(env, PPCInstr_FpLdFPSCR( fr_src ));
990 static HReg generate_zeroes_V128 ( ISelEnv* env )
992 HReg dst = newVRegV(env);
993 addInstr(env, PPCInstr_AvBinary(Pav_XOR, dst, dst, dst));
999 static HReg generate_ones_V128 ( ISelEnv* env )
1001 HReg dst = newVRegV(env);
1003 addInstr(env, PPCInstr_AvSplat(8, dst, src));
1015 static HReg mk_AvDuplicateRI( ISelEnv* env, IRExpr* e )
1018 HReg dst = newVRegV(env);
1019 PPCRI* ri = iselWordExpr_RI(env, e);
1020 IRType ty = typeOfIRExpr(env->type_env,e);
1032 HReg v1 = newVRegV(env);
1033 HReg v2 = newVRegV(env);
1034 addInstr(env, PPCInstr_AvSplat(sz, v1, PPCVI5s_Imm(-16)));
1035 addInstr(env, PPCInstr_AvSplat(sz, v2, PPCVI5s_Imm(simm6-16)));
1036 addInstr(env,
1043 HReg v1 = newVRegV(env);
1044 HReg v2 = newVRegV(env);
1045 addInstr(env, PPCInstr_AvSplat(sz, v1, PPCVI5s_Imm(-16)));
1046 addInstr(env, PPCInstr_AvSplat(sz, v2, PPCVI5s_Imm(simm6+16)));
1047 addInstr(env,
1054 addInstr(env, PPCInstr_AvSplat(sz, dst, PPCVI5s_Imm(simm6)));
1059 r_src = newVRegI(env);
1060 addInstr(env, PPCInstr_LI(r_src, (Long)simm32, env->mode64));
1072 HReg v_src = newVRegV(env);
1075 sub_from_sp( env, 32 ); // Move SP down
1077 r_aligned16 = get_sp_aligned16( env );
1081 addInstr(env, PPCInstr_Store( 4, am_off12, r_src, env->mode64 ));
1084 addInstr(env, PPCInstr_AvLdSt( True/*ld*/, 4, v_src, am_off12 ) );
1085 add_to_sp( env, 32 ); // Reset SP
1088 addInstr(env, PPCInstr_AvSplat(sz, dst, PPCVI5s_Reg(v_src)));
1095 static HReg isNan ( ISelEnv* env, HReg vSrc )
1101 zeros = mk_AvDuplicateRI(env, mkU32(0));
1102 msk_exp = mk_AvDuplicateRI(env, mkU32(0x7F800000));
1103 msk_mnt = mk_AvDuplicateRI(env, mkU32(0x7FFFFF));
1104 expt = newVRegV(env);
1105 mnts = newVRegV(env);
1106 vIsNan = newVRegV(env);
1111 addInstr(env, PPCInstr_AvBinary(Pav_AND, expt, vSrc, msk_exp));
1112 addInstr(env, PPCInstr_AvBin32x4(Pav_CMPEQU, expt, expt, msk_exp));
1113 addInstr(env, PPCInstr_AvBinary(Pav_AND, mnts, vSrc, msk_mnt));
1114 addInstr(env, PPCInstr_AvBin32x4(Pav_CMPGTU, mnts, mnts, zeros));
1115 addInstr(env, PPCInstr_AvBinary(Pav_AND, vIsNan, expt, mnts));
1139 static HReg iselWordExpr_R ( ISelEnv* env, IRExpr* e )
1141 HReg r = iselWordExpr_R_wrk(env, e);
1147 vassert(hregClass(r) == HRcGPR(env->mode64));
1153 static HReg iselWordExpr_R_wrk ( ISelEnv* env, IRExpr* e )
1155 Bool mode64 = env->mode64;
1159 IRType ty = typeOfIRExpr(env->type_env,e);
1167 return lookupIRTemp(env, e->Iex.RdTmp.tmp);
1175 r_dst = newVRegI(env);
1176 am_addr = iselWordExpr_AMode( env, e->Iex.Load.addr, ty/*of xfer*/ );
1177 addInstr(env, PPCInstr_Load( toUChar(sizeofIRType(ty)),
1206 HReg r_dst = newVRegI(env);
1207 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1212 ri_srcR = iselWordExpr_RH(env, True/*signed*/,
1216 ri_srcR = iselWordExpr_RH(env, False/*signed*/,
1222 addInstr(env, PPCInstr_Alu(aluOp, r_dst, r_srcL, ri_srcR));
1239 HReg r_dst = newVRegI(env);
1240 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1246 ri_srcR = iselWordExpr_RH5u(env, e->Iex.Binop.arg2);
1248 ri_srcR = iselWordExpr_RH6u(env, e->Iex.Binop.arg2);
1258 HReg tmp = newVRegI(env);
1259 addInstr(env, PPCInstr_Shft(Pshft_SHL,
1262 addInstr(env, PPCInstr_Shft(shftOp,
1273 addInstr(env, PPCInstr_Shft(shftOp, False/*64bit shift*/,
1276 addInstr(env, PPCInstr_Shft(shftOp, True/*32bit shift*/,
1286 HReg r_dst = newVRegI(env);
1287 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1288 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
1289 addInstr(env, PPCInstr_Div(syned, True/*32bit div*/,
1296 HReg r_dst = newVRegI(env);
1297 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1298 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
1300 addInstr(env, PPCInstr_Div(syned, False/*64bit div*/,
1310 HReg r_dst = newVRegI(env);
1311 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1312 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
1313 addInstr(env, PPCInstr_MulL(syned, False/*lo32*/, sz32,
1322 HReg tLo = newVRegI(env);
1323 HReg tHi = newVRegI(env);
1324 HReg r_dst = newVRegI(env);
1326 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1327 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
1328 addInstr(env, PPCInstr_MulL(False/*signedness irrelevant*/,
1331 addInstr(env, PPCInstr_MulL(syned,
1334 addInstr(env, PPCInstr_Shft(Pshft_SHL, False/*64bit shift*/,
1336 addInstr(env, PPCInstr_Alu(Palu_OR,
1345 HReg dst = newVRegI(env);
1346 HReg srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1347 PPCRH* srcR = iselWordExpr_RH(env, syned, e->Iex.Binop.arg2);
1348 addInstr(env, PPCInstr_Cmp(syned, True/*32bit cmp*/,
1350 addInstr(env, PPCInstr_MfCR(dst));
1351 addInstr(env, PPCInstr_Alu(Palu_AND, dst, dst,
1359 HReg dst = newVRegI(env);
1360 HReg srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1361 PPCRH* srcR = iselWordExpr_RH(env, syned, e->Iex.Binop.arg2);
1363 addInstr(env, PPCInstr_Cmp(syned, False/*64bit cmp*/,
1365 addInstr(env, PPCInstr_MfCR(dst));
1366 addInstr(env, PPCInstr_Alu(Palu_AND, dst, dst,
1372 HReg r1 = iselWordExpr_R(env, e->Iex.Binop.arg1);
1373 HReg r2 = iselWordExpr_R(env, e->Iex.Binop.arg2);
1374 HReg rdst = newVRegI(env);
1376 addInstr(env, mk_iMOVds_RR(rdst, r1));
1377 addInstr(env, PPCInstr_Cmp(False/*unsigned*/, True/*32bit cmp*/,
1379 addInstr(env, PPCInstr_CMov(cc, rdst, PPCRI_Reg(r2)));
1384 HReg r_Hi = iselWordExpr_R(env, e->Iex.Binop.arg1);
1385 HReg r_Lo = iselWordExpr_R(env, e->Iex.Binop.arg2);
1386 HReg r_dst = newVRegI(env);
1387 HReg msk = newVRegI(env);
1390 addInstr(env, PPCInstr_Shft(Pshft_SHL, False/*64bit shift*/,
1392 addInstr(env, PPCInstr_LI(msk, 0xFFFFFFFF, mode64));
1393 addInstr(env, PPCInstr_Alu( Palu_AND, r_Lo, r_Lo,
1395 addInstr(env, PPCInstr_Alu( Palu_OR, r_dst, r_dst,
1401 HReg fr_srcL = iselDblExpr(env, e->Iex.Binop.arg1);
1402 HReg fr_srcR = iselDblExpr(env, e->Iex.Binop.arg2);
1404 HReg r_ccPPC = newVRegI(env);
1405 HReg r_ccIR = newVRegI(env);
1406 HReg r_ccIR_b0 = newVRegI(env);
1407 HReg r_ccIR_b2 = newVRegI(env);
1408 HReg r_ccIR_b6 = newVRegI(env);
1410 addInstr(env, PPCInstr_FpCmp(r_ccPPC, fr_srcL, fr_srcR));
1424 addInstr(env, PPCInstr_Shft(Pshft_SHR, True/*32bit shift*/,
1427 addInstr(env, PPCInstr_Alu(Palu_OR, r_ccIR_b0,
1429 addInstr(env, PPCInstr_Alu(Palu_AND, r_ccIR_b0,
1433 addInstr(env, PPCInstr_Shft(Pshft_SHL, True/*32bit shift*/,
1436 addInstr(env, PPCInstr_Alu(Palu_AND, r_ccIR_b2,
1440 addInstr(env, PPCInstr_Shft(Pshft_SHR, True/*32bit shift*/,
1443 addInstr(env, PPCInstr_Alu(Palu_OR, r_ccIR_b6,
1445 addInstr(env, PPCInstr_Shft(Pshft_SHL, True/*32bit shift*/,
1448 addInstr(env, PPCInstr_Alu(Palu_AND, r_ccIR_b6,
1452 addInstr(env, PPCInstr_Alu(Palu_OR, r_ccIR,
1454 addInstr(env, PPCInstr_Alu(Palu_OR, r_ccIR,
1461 HReg r1 = StackFramePtr(env->mode64);
1463 HReg fsrc = iselDblExpr(env, e->Iex.Binop.arg2);
1464 HReg ftmp = newVRegF(env);
1465 HReg idst = newVRegI(env);
1468 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
1470 sub_from_sp( env, 16 );
1471 addInstr(env, PPCInstr_FpCftI(False/*F->I*/, True/*int32*/,
1473 addInstr(env, PPCInstr_FpSTFIW(r1, ftmp));
1474 addInstr(env, PPCInstr_Load(4, idst, zero_r1, mode64));
1478 addInstr(env, PPCInstr_Unary(Pun_EXTSW, idst, idst));
1480 add_to_sp( env, 16 );
1483 //set_FPU_rounding_default( env );
1489 HReg r1 = StackFramePtr(env->mode64);
1491 HReg fsrc = iselDblExpr(env, e->Iex.Binop.arg2);
1492 HReg idst = newVRegI(env);
1493 HReg ftmp = newVRegF(env);
1496 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
1498 sub_from_sp( env, 16 );
1499 addInstr(env, PPCInstr_FpCftI(False/*F->I*/, False/*int64*/,
1501 addInstr(env, PPCInstr_FpLdSt(False/*store*/, 8, ftmp, zero_r1));
1502 addInstr(env, PPCInstr_Load(8, idst, zero_r1, True/*mode64*/));
1503 add_to_sp( env, 16 );
1506 //set_FPU_rounding_default( env );
1523 HReg r_dst = newVRegI(env);
1524 HReg r_src = iselWordExpr_R(env, expr32);
1525 addInstr(env, PPCInstr_Alu(Palu_AND, r_dst,
1537 HReg r_dst = newVRegI(env);
1539 = iselWordExpr_AMode( env, mi.bindee[0], Ity_I16/*xfer*/ );
1540 addInstr(env, PPCInstr_Load(2,r_dst,amode, mode64));
1551 HReg r_dst = newVRegI(env);
1552 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1555 addInstr(env, PPCInstr_Alu(Palu_AND,r_dst,r_src,
1560 HReg r_dst = newVRegI(env);
1561 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1563 addInstr(env,
1566 addInstr(env,
1574 HReg r_dst = newVRegI(env);
1575 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1577 addInstr(env,
1580 addInstr(env,
1587 HReg r_dst = newVRegI(env);
1588 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1592 addInstr(env,
1595 addInstr(env,
1601 HReg r_dst = newVRegI(env);
1602 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1606 addInstr(env,
1615 HReg r_dst = newVRegI(env);
1616 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1617 addInstr(env, PPCInstr_Unary(Pun_NOT,r_dst,r_src));
1623 iselInt64Expr(&rHi,&rLo, env, e->Iex.Unop.arg);
1626 HReg r_dst = newVRegI(env);
1627 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1628 addInstr(env,
1637 iselInt64Expr(&rHi,&rLo, env, e->Iex.Unop.arg);
1641 return iselWordExpr_R(env, e->Iex.Unop.arg);
1646 return iselWordExpr_R(env, e->Iex.Unop.arg);
1652 HReg r_dst = newVRegI(env);
1653 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1655 addInstr(env,
1663 iselInt128Expr(&rHi,&rLo, env, e->Iex.Unop.arg);
1670 iselInt128Expr(&rHi,&rLo, env, e->Iex.Unop.arg);
1676 HReg r_dst = newVRegI(env);
1677 PPCCondCode cond = iselCondCode(env, e->Iex.Unop.arg);
1678 addInstr(env, PPCInstr_Set(cond,r_dst));
1685 HReg r_dst = newVRegI(env);
1686 PPCCondCode cond = iselCondCode(env, e->Iex.Unop.arg);
1687 addInstr(env, PPCInstr_Set(cond,r_dst));
1688 addInstr(env,
1691 addInstr(env,
1699 HReg r_dst = newVRegI(env);
1700 PPCCondCode cond = iselCondCode(env, e->Iex.Unop.arg);
1701 addInstr(env, PPCInstr_Set(cond,r_dst));
1702 addInstr(env, PPCInstr_Shft(Pshft_SHL, False/*64bit shift*/,
1704 addInstr(env, PPCInstr_Shft(Pshft_SAR, False/*64bit shift*/,
1717 r_dst = newVRegI(env);
1718 r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1719 addInstr(env, PPCInstr_Unary(op_clz,r_dst,r_src));
1729 r_dst = newVRegI(env);
1730 r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1731 addInstr(env, PPCInstr_Unary(Pun_NEG,r_dst,r_src));
1732 addInstr(env, PPCInstr_Alu(Palu_OR, r_dst, r_dst, PPCRH_Reg(r_src)));
1737 HReg r_dst = newVRegI(env);
1738 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1739 addInstr(env, PPCInstr_Unary(Pun_NEG,r_dst,r_src));
1740 addInstr(env, PPCInstr_Alu(Palu_OR, r_dst, r_dst, PPCRH_Reg(r_src)));
1741 addInstr(env, PPCInstr_Shft(Pshft_SAR, True/*32bit shift*/,
1747 HReg r_dst = newVRegI(env);
1748 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1750 addInstr(env, PPCInstr_Unary(Pun_NEG,r_dst,r_src));
1751 addInstr(env, PPCInstr_Alu(Palu_OR, r_dst, r_dst, PPCRH_Reg(r_src)));
1752 addInstr(env, PPCInstr_Shft(Pshft_SAR, False/*64bit shift*/,
1759 HReg dst = newVRegI(env);
1760 HReg vec = iselVecExpr(env, e->Iex.Unop.arg);
1762 sub_from_sp( env, 32 ); // Move SP down 32 bytes
1765 r_aligned16 = get_sp_aligned16( env );
1770 addInstr(env,
1772 addInstr(env,
1775 add_to_sp( env, 32 ); // Reset SP
1783 HReg dst = newVRegI(env);
1784 HReg vec = iselVecExpr(env, e->Iex.Unop.arg);
1786 sub_from_sp( env, 32 ); // Move SP down 32 bytes
1789 r_aligned16 = get_sp_aligned16( env );
1794 addInstr(env,
1796 addInstr(env,
1802 add_to_sp( env, 32 ); // Reset SP
1811 return iselWordExpr_R(env, e->Iex.Unop.arg);
1819 HReg fr_src = iselDblExpr(env, e->Iex.Unop.arg);
1820 HReg r_dst = newVRegI(env);
1822 sub_from_sp( env, 16 ); // Move SP down 16 bytes
1826 addInstr(env, PPCInstr_FpLdSt( False/*store*/, 8,
1829 addInstr(env, PPCInstr_Load( 8, r_dst, am_addr, mode64 ));
1831 add_to_sp( env, 16 ); // Reset SP
1843 HReg fr_src = iselFltExpr(env, e->Iex.Unop.arg);
1844 HReg r_dst = newVRegI(env);
1846 sub_from_sp( env, 16 ); // Move SP down 16 bytes
1850 addInstr(env, PPCInstr_FpLdSt( False/*store*/, 4,
1853 addInstr(env, PPCInstr_Load( 4, r_dst, am_addr, mode64 ));
1855 add_to_sp( env, 16 ); // Reset SP
1869 HReg r_dst = newVRegI(env);
1872 addInstr(env, PPCInstr_Load( toUChar(sizeofIRType(ty)),
1881 = genGuestArrayOffset( env, e->Iex.GetI.descr,
1883 HReg r_dst = newVRegI(env);
1885 addInstr(env, PPCInstr_Load( toUChar(8),
1890 addInstr(env, PPCInstr_Load( toUChar(4),
1899 HReg r_dst = newVRegI(env);
1908 doHelperCall( env, False, NULL,
1912 addInstr(env, mk_iMOVds_RR(r_dst, hregPPC_GPR3(mode64)));
1920 HReg r_dst = newVRegI(env);
1930 addInstr(env, PPCInstr_LI(r_dst, (ULong)l, mode64));
1938 typeOfIRExpr(env->type_env,e->Iex.Mux0X.cond) == Ity_I8) {
1940 HReg r_cond = iselWordExpr_R(env, e->Iex.Mux0X.cond);
1941 HReg rX = iselWordExpr_R(env, e->Iex.Mux0X.exprX);
1942 PPCRI* r0 = iselWordExpr_RI(env, e->Iex.Mux0X.expr0);
1943 HReg r_dst = newVRegI(env);
1944 HReg r_tmp = newVRegI(env);
1945 addInstr(env, mk_iMOVds_RR(r_dst,rX));
1946 addInstr(env, PPCInstr_Alu(Palu_AND, r_tmp,
1948 addInstr(env, PPCInstr_Cmp(False/*unsigned*/, True/*32bit cmp*/,
1950 addInstr(env, PPCInstr_CMov(cc,r_dst,r0));
2002 static Bool sane_AMode ( ISelEnv* env, PPCAMode* am )
2004 Bool mode64 = env->mode64;
2023 PPCAMode* iselWordExpr_AMode ( ISelEnv* env, IRExpr* e, IRType xferTy )
2025 PPCAMode* am = iselWordExpr_AMode_wrk(env, e, xferTy);
2026 vassert(sane_AMode(env, am));
2031 static PPCAMode* iselWordExpr_AMode_wrk ( ISelEnv* env, IRExpr* e, IRType xferTy )
2033 IRType ty = typeOfIRExpr(env->type_env,e);
2035 if (env->mode64) {
2059 iselWordExpr_R(env, e->Iex.Binop.arg1) );
2065 HReg r_base = iselWordExpr_R(env, e->Iex.Binop.arg1);
2066 HReg r_idx = iselWordExpr_R(env, e->Iex.Binop.arg2);
2082 iselWordExpr_R(env, e->Iex.Binop.arg1) );
2088 HReg r_base = iselWordExpr_R(env, e->Iex.Binop.arg1);
2089 HReg r_idx = iselWordExpr_R(env, e->Iex.Binop.arg2);
2097 return PPCAMode_IR( 0, iselWordExpr_R(env,e) );
2110 static PPCRH* iselWordExpr_RH ( ISelEnv* env, Bool syned, IRExpr* e )
2112 PPCRH* ri = iselWordExpr_RH_wrk(env, syned, e);
2121 vassert(hregClass(ri->Prh.Reg.reg) == HRcGPR(env->mode64));
2130 static PPCRH* iselWordExpr_RH_wrk ( ISelEnv* env, Bool syned, IRExpr* e )
2134 IRType ty = typeOfIRExpr(env->type_env,e);
2136 ty == Ity_I32 || ((ty == Ity_I64) && env->mode64));
2144 case Ico_U64: vassert(env->mode64);
2163 return PPCRH_Reg( iselWordExpr_R ( env, e ) );
2173 static PPCRI* iselWordExpr_RI ( ISelEnv* env, IRExpr* e )
2175 PPCRI* ri = iselWordExpr_RI_wrk(env, e);
2181 vassert(hregClass(ri->Pri.Reg) == HRcGPR(env->mode64));
2190 static PPCRI* iselWordExpr_RI_wrk ( ISelEnv* env, IRExpr* e )
2193 IRType ty = typeOfIRExpr(env->type_env,e);
2195 ty == Ity_I32 || ((ty == Ity_I64) && env->mode64));
2201 case Ico_U64: vassert(env->mode64);
2212 return PPCRI_Reg( iselWordExpr_R ( env, e ) );
2222 static PPCRH* iselWordExpr_RH5u ( ISelEnv* env, IRExpr* e )
2225 vassert(!env->mode64);
2226 ri = iselWordExpr_RH5u_wrk(env, e);
2234 vassert(hregClass(ri->Prh.Reg.reg) == HRcGPR(env->mode64));
2243 static PPCRH* iselWordExpr_RH5u_wrk ( ISelEnv* env, IRExpr* e )
2245 IRType ty = typeOfIRExpr(env->type_env,e);
2257 return PPCRH_Reg( iselWordExpr_R ( env, e ) );
2267 static PPCRH* iselWordExpr_RH6u ( ISelEnv* env, IRExpr* e )
2270 vassert(env->mode64);
2271 ri = iselWordExpr_RH6u_wrk(env, e);
2279 vassert(hregClass(ri->Prh.Reg.reg) == HRcGPR(env->mode64));
2288 static PPCRH* iselWordExpr_RH6u_wrk ( ISelEnv* env, IRExpr* e )
2290 IRType ty = typeOfIRExpr(env->type_env,e);
2302 return PPCRH_Reg( iselWordExpr_R ( env, e ) );
2312 static PPCCondCode iselCondCode ( ISelEnv* env, IRExpr* e )
2315 return iselCondCode_wrk(env,e);
2319 static PPCCondCode iselCondCode_wrk ( ISelEnv* env, IRExpr* e )
2322 vassert(typeOfIRExpr(env->type_env,e) == Ity_I1);
2327 HReg r_zero = newVRegI(env);
2328 addInstr(env, PPCInstr_LI(r_zero, 0, env->mode64));
2329 addInstr(env, PPCInstr_Cmp(False/*unsigned*/, True/*32bit cmp*/,
2337 PPCCondCode cond = iselCondCode(env, e->Iex.Unop.arg);
2347 HReg src = iselWordExpr_R(env, e->Iex.Unop.arg);
2348 HReg tmp = newVRegI(env);
2350 addInstr(env, PPCInstr_Alu(Palu_AND, tmp,
2352 addInstr(env, PPCInstr_Cmp(False/*unsigned*/, True/*32bit cmp*/,
2363 HReg arg = iselWordExpr_R(env, e->Iex.Unop.arg);
2364 HReg tmp = newVRegI(env);
2365 addInstr(env, PPCInstr_Alu(Palu_AND, tmp, arg,
2367 addInstr(env, PPCInstr_Cmp(False/*unsigned*/, True/*32bit cmp*/,
2377 HReg r1 = iselWordExpr_R(env, e->Iex.Unop.arg);
2378 addInstr(env, PPCInstr_Cmp(False/*unsigned*/, True/*32bit cmp*/,
2395 HReg r1 = iselWordExpr_R(env, e->Iex.Binop.arg1);
2396 PPCRH* ri2 = iselWordExpr_RH(env, syned, e->Iex.Binop.arg2);
2397 addInstr(env, PPCInstr_Cmp(syned, True/*32bit cmp*/,
2414 if (!env->mode64) {
2416 HReg tmp = newVRegI(env);
2417 iselInt64Expr( &hi, &lo, env, e->Iex.Unop.arg );
2418 addInstr(env, PPCInstr_Alu(Palu_OR, tmp, lo, PPCRH_Reg(hi)));
2419 addInstr(env, PPCInstr_Cmp(False/*sign*/, True/*32bit cmp*/,
2423 HReg r_src = iselWordExpr_R(env, e->Iex.Binop.arg1);
2424 addInstr(env, PPCInstr_Cmp(False/*sign*/, False/*64bit cmp*/,
2442 HReg r1 = iselWordExpr_R(env, e->Iex.Binop.arg1);
2443 PPCRH* ri2 = iselWordExpr_RH(env, syned, e->Iex.Binop.arg2);
2444 vassert(env->mode64);
2445 addInstr(env, PPCInstr_Cmp(syned, False/*64bit cmp*/,
2459 HReg r_src = lookupIRTemp(env, e->Iex.RdTmp.tmp);
2460 HReg src_masked = newVRegI(env);
2461 addInstr(env,
2464 addInstr(env,
2487 ISelEnv* env, IRExpr* e )
2489 vassert(env->mode64);
2490 iselInt128Expr_wrk(rHi, rLo, env, e);
2494 vassert(hregClass(*rHi) == HRcGPR(env->mode64));
2496 vassert(hregClass(*rLo) == HRcGPR(env->mode64));
2502 ISelEnv* env, IRExpr* e )
2505 vassert(typeOfIRExpr(env->type_env,e) == Ity_I128);
2509 lookupIRTempPair( rHi, rLo, env, e->Iex.RdTmp.tmp);
2519 HReg tLo = newVRegI(env);
2520 HReg tHi = newVRegI(env);
2522 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
2523 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
2524 addInstr(env, PPCInstr_MulL(False/*signedness irrelevant*/,
2527 addInstr(env, PPCInstr_MulL(syned,
2537 *rHi = iselWordExpr_R(env, e->Iex.Binop.arg1);
2538 *rLo = iselWordExpr_R(env, e->Iex.Binop.arg2);
2572 ISelEnv* env, IRExpr* e )
2574 vassert(!env->mode64);
2575 iselInt64Expr_wrk(rHi, rLo, env, e);
2587 ISelEnv* env, IRExpr* e )
2590 vassert(typeOfIRExpr(env->type_env,e) == Ity_I64);
2594 HReg tLo = newVRegI(env);
2595 HReg tHi = newVRegI(env);
2596 HReg r_addr = iselWordExpr_R(env, e->Iex.Load.addr);
2597 vassert(!env->mode64);
2598 addInstr(env, PPCInstr_Load( 4/*byte-load*/,
2601 addInstr(env, PPCInstr_Load( 4/*byte-load*/,
2614 HReg tLo = newVRegI(env);
2615 HReg tHi = newVRegI(env);
2617 addInstr(env, PPCInstr_LI(tHi, (Long)(Int)wHi, False/*mode32*/));
2618 addInstr(env, PPCInstr_LI(tLo, (Long)(Int)wLo, False/*mode32*/));
2626 lookupIRTempPair( rHi, rLo, env, e->Iex.RdTmp.tmp);
2634 PPCAMode* am_addr4 = advance4(env, am_addr);
2635 HReg tLo = newVRegI(env);
2636 HReg tHi = newVRegI(env);
2637 addInstr(env, PPCInstr_Load( 4, tHi, am_addr, False/*mode32*/ ));
2638 addInstr(env, PPCInstr_Load( 4, tLo, am_addr4, False/*mode32*/ ));
2647 HReg tLo = newVRegI(env);
2648 HReg tHi = newVRegI(env);
2651 HReg r_cond = iselWordExpr_R(env, e->Iex.Mux0X.cond);
2652 HReg r_tmp = newVRegI(env);
2654 iselInt64Expr(&e0Hi, &e0Lo, env, e->Iex.Mux0X.expr0);
2655 iselInt64Expr(&eXHi, &eXLo, env, e->Iex.Mux0X.exprX);
2656 addInstr(env, mk_iMOVds_RR(tHi,eXHi));
2657 addInstr(env, mk_iMOVds_RR(tLo,eXLo));
2659 addInstr(env, PPCInstr_Alu(Palu_AND,
2661 addInstr(env, PPCInstr_Cmp(False/*unsigned*/, True/*32bit cmp*/,
2664 addInstr(env, PPCInstr_CMov(cc,tHi,PPCRI_Reg(e0Hi)));
2665 addInstr(env, PPCInstr_CMov(cc,tLo,PPCRI_Reg(e0Lo)));
2678 HReg tLo = newVRegI(env);
2679 HReg tHi = newVRegI(env);
2681 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
2682 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
2683 addInstr(env, PPCInstr_MulL(False/*signedness irrelevant*/,
2686 addInstr(env, PPCInstr_MulL(syned,
2699 HReg tLo = newVRegI(env);
2700 HReg tHi = newVRegI(env);
2703 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1);
2704 iselInt64Expr(&yHi, &yLo, env, e->Iex.Binop.arg2);
2705 addInstr(env, PPCInstr_Alu(op, tHi, xHi, PPCRH_Reg(yHi)));
2706 addInstr(env, PPCInstr_Alu(op, tLo, xLo, PPCRH_Reg(yLo)));
2715 HReg tLo = newVRegI(env);
2716 HReg tHi = newVRegI(env);
2717 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1);
2718 iselInt64Expr(&yHi, &yLo, env
2719 addInstr(env, PPCInstr_AddSubC( True/*add*/, True /*set carry*/,
2721 addInstr(env, PPCInstr_AddSubC( True/*add*/, False/*read carry*/,
2730 *rHi = iselWordExpr_R(env, e->Iex.Binop.arg1);
2731 *rLo = iselWordExpr_R(env, e->Iex.Binop.arg2);
2736 HReg tLo = newVRegI(env);
2737 HReg tHi = newVRegI(env);
2738 HReg r1 = StackFramePtr(env->mode64);
2741 HReg fsrc = iselDblExpr(env, e->Iex.Binop.arg2);
2742 HReg ftmp = newVRegF(env);
2744 vassert(!env->mode64);
2746 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
2748 sub_from_sp( env, 16 );
2749 addInstr(env, PPCInstr_FpCftI(False/*F->I*/, False/*int64*/,
2751 addInstr(env, PPCInstr_FpLdSt(False/*store*/, 8, ftmp, zero_r1));
2752 addInstr(env, PPCInstr_Load(4, tHi, zero_r1, False/*mode32*/));
2753 addInstr(env, PPCInstr_Load(4, tLo, four_r1, False/*mode32*/));
2754 add_to_sp( env, 16 );
2757 //set_FPU_rounding_default( env );
2776 HReg tmp1 = newVRegI(env);
2777 HReg tmp2 = newVRegI(env);
2778 iselInt64Expr(&argHi, &argLo, env, e->Iex.Unop.arg);
2780 addInstr(env, PPCInstr_Alu(Palu_OR, tmp1, argHi, PPCRH_Reg(argLo)));
2782 addInstr(env, PPCInstr_Unary(Pun_NEG,tmp2,tmp1));
2783 addInstr(env, PPCInstr_Alu(Palu_OR, tmp2, tmp2, PPCRH_Reg(tmp1)));
2784 addInstr(env, PPCInstr_Shft(Pshft_SAR, True/*32bit shift*/,
2794 HReg zero32 = newVRegI(env);
2795 HReg resHi = newVRegI(env);
2796 HReg resLo = newVRegI(env);
2797 iselInt64Expr(&argHi, &argLo, env, e->Iex.Unop.arg);
2798 vassert(env->mode64 == False);
2799 addInstr(env, PPCInstr_LI(zero32, 0, env->mode64));
2801 addInstr(env, PPCInstr_AddSubC( False/*sub*/, True/*set carry*/,
2803 addInstr(env, PPCInstr_AddSubC( False/*sub*/, False/*read carry*/,
2806 addInstr(env, PPCInstr_Alu(Palu_OR, resLo, resLo, PPCRH_Reg(argLo)));
2807 addInstr(env, PPCInstr_Alu(Palu_OR, resHi, resHi, PPCRH_Reg(argHi)));
2815 HReg tHi = newVRegI(env);
2816 HReg src = iselWordExpr_R(env, e->Iex.Unop.arg);
2817 addInstr(env, PPCInstr_Shft(Pshft_SAR, True/*32bit shift*/,
2826 HReg tHi = newVRegI(env);
2827 HReg tLo = iselWordExpr_R(env, e->Iex.Unop.arg);
2828 addInstr(env, PPCInstr_LI(tHi, 0, False/*mode32*/));
2839 HReg tLo = newVRegI(env);
2840 HReg tHi = newVRegI(env);
2841 HReg vec = iselVecExpr(env, e->Iex.Unop.arg);
2843 sub_from_sp( env, 32 ); // Move SP down 32 bytes
2846 r_aligned16 = get_sp_aligned16( env );
2852 addInstr(env,
2856 addInstr(env,
2858 addInstr(env,
2861 add_to_sp( env, 32 ); // Reset SP
2869 HReg tLo = newVRegI(env);
2870 HReg tHi = newVRegI(env);
2871 PPCCondCode cond = iselCondCode(env, e->Iex.Unop.arg);
2872 addInstr(env, PPCInstr_Set(cond,tLo));
2873 addInstr(env, PPCInstr_Shft(Pshft_SHL, True/*32bit shift*/,
2875 addInstr(env, PPCInstr_Shft(Pshft_SAR, True/*32bit shift*/,
2877 addInstr(env, mk_iMOVds_RR(tHi, tLo));
2888 HReg fr_src = iselDblExpr(env, e->Iex.Unop.arg);
2889 HReg r_dstLo = newVRegI(env);
2890 HReg r_dstHi = newVRegI(env);
2892 sub_from_sp( env, 16 ); // Move SP down 16 bytes
2897 addInstr(env, PPCInstr_FpLdSt( False/*store*/, 8,
2901 addInstr(env, PPCInstr_Load( 4, r_dstHi,
2903 addInstr(env, PPCInstr_Load( 4, r_dstLo,
2908 add_to_sp( env, 16 ); // Reset SP
2930 static HReg iselFltExpr ( ISelEnv* env, IRExpr* e )
2932 HReg r = iselFltExpr_wrk( env, e );
2942 static HReg iselFltExpr_wrk ( ISelEnv* env, IRExpr* e )
2944 IRType ty = typeOfIRExpr(env->type_env,e);
2948 return lookupIRTemp(env, e->Iex.RdTmp.tmp);
2953 HReg r_dst = newVRegF(env);
2955 am_addr = iselWordExpr_AMode(env, e->Iex.Load.addr, Ity_F32/*xfer*/);
2956 addInstr(env, PPCInstr_FpLdSt(True/*load*/, 4, r_dst, am_addr));
2961 HReg r_dst = newVRegF(env);
2963 GuestStatePtr(env->mode64) );
2964 addInstr(env, PPCInstr_FpLdSt( True/*load*/, 4, r_dst, am_addr ));
2997 HReg fsrc = iselDblExpr(env, e->Iex.Unop.arg);
2998 HReg fdst = newVRegF(env);
2999 PPCAMode* zero_r1 = PPCAMode_IR( 0, StackFramePtr(env->mode64) );
3001 sub_from_sp( env, 16 );
3003 addInstr(env, PPCInstr_FpLdSt( False/*store*/, 4,
3006 addInstr(env, PPCInstr_FpLdSt( True/*load*/, 4,
3008 add_to_sp( env, 16 );
3045 static HReg iselDblExpr ( ISelEnv* env, IRExpr* e )
3047 HReg r = iselDblExpr_wrk( env, e );
3057 static HReg iselDblExpr_wrk ( ISelEnv* env, IRExpr* e )
3059 Bool mode64 = env->mode64;
3060 IRType ty = typeOfIRExpr(env->type_env,e);
3065 return lookupIRTemp(env, e->Iex.RdTmp.tmp);
3086 HReg r_srcHi = newVRegI(env);
3087 HReg r_srcLo = newVRegI(env);
3088 addInstr(env, PPCInstr_LI(r_srcHi, u.u32x2[0], mode64));
3089 addInstr(env, PPCInstr_LI(r_srcLo, u.u32x2[1], mode64));
3090 return mk_LoadRR32toFPR( env, r_srcHi, r_srcLo );
3092 HReg r_src = newVRegI(env);
3093 addInstr(env, PPCInstr_LI(r_src, u.u64, mode64));
3094 return mk_LoadR64toFPR( env, r_src ); // 1*I64 -> F64
3100 HReg r_dst = newVRegF(env);
3103 am_addr = iselWordExpr_AMode(env, e->Iex.Load.addr, Ity_F64/*xfer*/);
3104 addInstr(env, PPCInstr_FpLdSt(True/*load*/, 8, r_dst, am_addr));
3110 HReg r_dst = newVRegF(env);
3113 addInstr(env, PPCInstr_FpLdSt( True/*load*/, 8, r_dst, am_addr ));
3128 HReg r_dst = newVRegF(env);
3129 HReg r_srcML = iselDblExpr(env, e->Iex.Qop.arg2);
3130 HReg r_srcMR = iselDblExpr(env, e->Iex.Qop.arg3);
3131 HReg r_srcAcc = iselDblExpr(env, e->Iex.Qop.arg4);
3132 set_FPU_rounding_mode( env, e->Iex.Qop.arg1 );
3133 addInstr(env, PPCInstr_FpMulAcc(fpop, r_dst,
3153 HReg r_dst = newVRegF(env);
3154 HReg r_srcL = iselDblExpr(env, e->Iex.Triop.arg2);
3155 HReg r_srcR = iselDblExpr(env, e->Iex.Triop.arg3);
3156 set_FPU_rounding_mode( env, e->Iex.Triop.arg1 );
3157 addInstr(env, PPCInstr_FpBinary(fpop, r_dst, r_srcL, r_srcR));
3169 HReg fr_dst = newVRegF(env);
3170 HReg fr_src = iselDblExpr(env, e->Iex.Binop.arg2);
3171 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
3172 addInstr(env, PPCInstr_FpUnary(fpop, fr_dst, fr_src));
3180 HReg r_dst = newVRegF(env);
3181 HReg r_src = iselDblExpr(env, e->Iex.Binop.arg2);
3182 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
3183 addInstr(env, PPCInstr_FpRSP(r_dst, r_src));
3184 //set_FPU_rounding_default( env );
3190 HReg fdst = newVRegF(env);
3191 HReg isrc = iselWordExpr_R(env, e->Iex.Binop.arg2);
3192 HReg r1 = StackFramePtr(env->mode64);
3196 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
3198 sub_from_sp( env, 16 );
3200 addInstr(env, PPCInstr_Store(8, zero_r1, isrc, True/*mode64*/));
3201 addInstr(env, PPCInstr_FpLdSt(True/*load*/, 8, fdst, zero_r1));
3202 addInstr(env, PPCInstr_FpCftI(True/*I->F*/, False/*int64*/,
3205 add_to_sp( env, 16 );
3208 //set_FPU_rounding_default( env );
3212 HReg fdst = newVRegF(env);
3214 HReg r1 = StackFramePtr(env->mode64);
3218 iselInt64Expr(&isrcHi, &isrcLo, env, e->Iex.Binop.arg2);
3221 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
3223 sub_from_sp( env, 16 );
3225 addInstr(env, PPCInstr_Store(4, zero_r1, isrcHi, False/*mode32*/));
3226 addInstr(env, PPCInstr_Store(4, four_r1, isrcLo, False/*mode32*/));
3227 addInstr(env, PPCInstr_FpLdSt(True/*load*/, 8, fdst, zero_r1));
3228 addInstr(env, PPCInstr_FpCftI(True/*I->F*/, False/*int64*/,
3231 add_to_sp( env, 16 );
3234 //set_FPU_rounding_default( env );
3254 HReg fr_dst = newVRegF(env);
3255 HReg fr_src = iselDblExpr(env, e->Iex.Unop.arg);
3256 addInstr(env, PPCInstr_FpUnary(fpop, fr_dst, fr_src));
3268 iselInt64Expr( &r_srcHi, &r_srcLo, env, e->Iex.Unop.arg);
3269 return mk_LoadRR32toFPR( env, r_srcHi, r_srcLo );
3271 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
3272 return mk_LoadR64toFPR( env, r_src );
3277 HReg res = iselFltExpr(env, e->Iex.Unop.arg);
3288 && typeOfIRExpr(env->type_env,e->Iex.Mux0X.cond) == Ity_I8) {
3290 HReg r_cond = iselWordExpr_R(env, e->Iex.Mux0X.cond);
3291 HReg frX = iselDblExpr(env, e->Iex.Mux0X.exprX);
3292 HReg fr0 = iselDblExpr(env, e->Iex.Mux0X.expr0);
3293 HReg fr_dst = newVRegF(env);
3294 HReg r_tmp = newVRegI(env);
3295 addInstr(env, PPCInstr_Alu(Palu_AND, r_tmp,
3297 addInstr(env, PPCInstr_FpUnary( Pfp_MOV, fr_dst, frX ));
3298 addInstr(env, PPCInstr_Cmp(False/*unsigned*/, True/*32bit cmp*/,
3300 addInstr(env, PPCInstr_FpCMov( cc, fr_dst, fr0 ));
3315 static HReg iselVecExpr ( ISelEnv* env, IRExpr* e )
3317 HReg r = iselVecExpr_wrk( env, e );
3327 static HReg iselVecExpr_wrk ( ISelEnv* env, IRExpr* e )
3329 Bool mode64 = env->mode64;
3331 IRType ty = typeOfIRExpr(env->type_env,e);
3336 return lookupIRTemp(env, e->Iex.RdTmp.tmp);
3342 HReg dst = newVRegV(env);
3343 addInstr(env,
3352 HReg v_dst = newVRegV(env);
3354 am_addr = iselWordExpr_AMode(env, e->Iex.Load.addr, Ity_V128/*xfer*/);
3355 addInstr(env, PPCInstr_AvLdSt( True/*load*/, 16, v_dst, am_addr));
3363 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
3364 HReg dst = newVRegV(env);
3365 addInstr(env, PPCInstr_AvUnary(Pav_NOT, dst, arg));
3370 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
3371 HReg zero = newVRegV(env);
3372 HReg dst = newVRegV(env);
3373 addInstr(env, PPCInstr_AvBinary(Pav_XOR, zero, zero, zero));
3374 addInstr(env, PPCInstr_AvBin8x16(Pav_CMPEQU, dst, arg, zero));
3375 addInstr(env, PPCInstr_AvUnary(Pav_NOT, dst, dst));
3380 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
3381 HReg zero = newVRegV(env);
3382 HReg dst = newVRegV(env);
3383 addInstr(env, PPCInstr_AvBinary(Pav_XOR, zero, zero, zero));
3384 addInstr(env, PPCInstr_AvBin16x8(Pav_CMPEQU, dst, arg, zero));
3385 addInstr(env, PPCInstr_AvUnary(Pav_NOT, dst, dst));
3390 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
3391 HReg zero = newVRegV(env);
3392 HReg dst = newVRegV(env);
3393 addInstr(env, PPCInstr_AvBinary(Pav_XOR, zero, zero, zero));
3394 addInstr(env, PPCInstr_AvBin32x4(Pav_CMPEQU, dst, arg, zero));
3395 addInstr(env, PPCInstr_AvUnary(Pav_NOT, dst, dst));
3411 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
3412 HReg dst = newVRegV(env);
3413 addInstr(env, PPCInstr_AvUn32Fx4(op, dst, arg));
3419 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
3420 HReg dst = newVRegV(env);
3422 sub_from_sp( env, 32 ); // Move SP down
3425 r_aligned16 = get_sp_aligned16( env );
3432 r_zeros = newVRegI(env);
3433 addInstr(env, PPCInstr_LI(r_zeros, 0x0, mode64));
3434 addInstr(env, PPCInstr_Store( 4, am_off0, r_zeros, mode64 ));
3435 addInstr(env, PPCInstr_Store( 4, am_off4, r_zeros, mode64 ));
3436 addInstr(env, PPCInstr_Store( 4, am_off8, r_zeros, mode64 ));
3439 addInstr(env, PPCInstr_Store( 4, am_off12, r_src, mode64 ));
3442 addInstr(env, PPCInstr_AvLdSt( True/*ld*/, 4, dst, am_off12 ));
3444 add_to_sp( env, 32 ); // Reset SP
3451 return mk_AvDuplicateRI(env, e->Iex.Binop.arg1);
3465 HReg dst = newVRegV(env);
3467 sub_from_sp( env, 32 ); // Move SP down
3470 r_aligned16 = get_sp_aligned16( env );
3477 iselInt64Expr(&r1, &r0, env, e->Iex.Binop.arg2);
3478 addInstr(env, PPCInstr_Store( 4, am_off12, r0, mode64 ));
3479 addInstr(env, PPCInstr_Store( 4, am_off8, r1, mode64 ));
3481 iselInt64Expr(&r3, &r2, env, e->Iex.Binop.arg1);
3482 addInstr(env, PPCInstr_Store( 4, am_off4, r2, mode64 ));
3483 addInstr(env, PPCInstr_Store( 4, am_off0, r3, mode64 ));
3486 addInstr(env, PPCInstr_AvLdSt(True/*ld*/, 16, dst, am_off0));
3488 add_to_sp( env, 32 ); // Reset SP
3491 HReg rHi = iselWordExpr_R(env, e->Iex.Binop.arg1);
3492 HReg rLo = iselWordExpr_R(env, e->Iex.Binop.arg2);
3493 HReg dst = newVRegV(env);
3497 sub_from_sp( env, 32 ); // Move SP down
3500 r_aligned16 = get_sp_aligned16( env );
3505 addInstr(env, PPCInstr_Store( 8, am_off0, rHi, mode64 ));
3506 addInstr(env, PPCInstr_Store( 8, am_off8, rLo, mode64 ));
3509 addInstr(env, PPCInstr_AvLdSt(True/*ld*/, 16, dst, am_off0));
3511 add_to_sp( env, 32 ); // Reset SP
3526 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1);
3527 HReg argR = iselVecExpr(env, e->Iex.Binop.arg2);
3528 HReg dst = newVRegV(env);
3529 addInstr(env, PPCInstr_AvBin32Fx4(op, dst, argL, argR));
3534 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1);
3535 HReg argR = iselVecExpr(env, e->Iex.Binop.arg2);
3536 HReg dst = newVRegV(env);
3542 HReg isNanLR = newVRegV(env);
3543 HReg isNanL = isNan(env, argL);
3544 HReg isNanR = isNan(env, argR);
3545 addInstr(env, PPCInstr_AvBinary(Pav_OR, isNanLR,
3548 addInstr(env, PPCInstr_AvBin32Fx4(Pavfp_CMPGTF, dst,
3550 addInstr(env, PPCInstr_AvBinary(Pav_OR, dst, dst, isNanLR));
3551 addInstr(env, PPCInstr_AvUnary(Pav_NOT, dst, dst));
3559 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1);
3560 HReg arg2 = iselVecExpr(env, e->Iex.Binop.arg2);
3561 HReg dst = newVRegV(env);
3562 addInstr(env, PPCInstr_AvBinary(op, dst, arg1, arg2));
3590 HReg arg1 = iselVecExpr(env
3591 HReg arg2 = iselVecExpr(env, e->Iex.Binop.arg2);
3592 HReg dst = newVRegV(env);
3593 addInstr(env, PPCInstr_AvBin8x16(op, dst, arg1, arg2));
3624 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1);
3625 HReg arg2 = iselVecExpr(env, e->Iex.Binop.arg2);
3626 HReg dst = newVRegV(env);
3627 addInstr(env, PPCInstr_AvBin16x8(op, dst, arg1, arg2));
3656 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1);
3657 HReg arg2 = iselVecExpr(env, e->Iex.Binop.arg2);
3658 HReg dst = newVRegV(env);
3659 addInstr(env, PPCInstr_AvBin32x4(op, dst, arg1, arg2));
3666 HReg r_src = iselVecExpr(env, e->Iex.Binop.arg1);
3667 HReg dst = newVRegV(env);
3668 HReg v_shft = mk_AvDuplicateRI(env, e->Iex.Binop.arg2);
3669 addInstr(env, PPCInstr_AvBin8x16(op, dst, r_src, v_shft));
3677 HReg r_src = iselVecExpr(env, e->Iex.Binop.arg1);
3678 HReg dst = newVRegV(env);
3679 HReg v_shft = mk_AvDuplicateRI(env, e->Iex.Binop.arg2);
3680 addInstr(env, PPCInstr_AvBin16x8(op, dst, r_src, v_shft));
3688 HReg r_src = iselVecExpr(env, e->Iex.Binop.arg1);
3689 HReg dst = newVRegV(env);
3690 HReg v_shft = mk_AvDuplicateRI(env, e->Iex.Binop.arg2);
3691 addInstr(env, PPCInstr_AvBin32x4(op, dst, r_src, v_shft));
3698 HReg dst = newVRegV(env);
3699 HReg r_src = iselVecExpr(env, e->Iex.Binop.arg1);
3700 HReg v_shft = mk_AvDuplicateRI(env, e->Iex.Binop.arg2);
3702 addInstr(env, PPCInstr_AvBinary(op, dst, r_src, v_shft));
3707 HReg dst = newVRegV(env);
3708 HReg v_src = iselVecExpr(env, e->Iex.Binop.arg1);
3709 HReg v_ctl = iselVecExpr(env, e->Iex.Binop.arg2);
3710 addInstr(env, PPCInstr_AvPerm(dst, v_src, v_src, v_ctl));
3722 return generate_zeroes_V128(env);
3725 return generate_ones_V128(env);
3731 env->hwcaps));
3741 static void iselStmt ( ISelEnv* env, IRStmt* stmt )
3743 Bool mode64 = env->mode64;
3754 IRType tya = typeOfIRExpr(env->type_env, stmt->Ist.Store.addr);
3755 IRType tyd = typeOfIRExpr(env->type_env, stmt->Ist.Store.data);
3768 = iselWordExpr_AMode(env, stmt->Ist.Store.addr, tyd/*of xfer*/);
3769 HReg r_src = iselWordExpr_R(env, stmt->Ist.Store.data);
3770 addInstr(env, PPCInstr_Store( toUChar(sizeofIRType(tyd)),
3776 = iselWordExpr_AMode(env, stmt->Ist.Store.addr, tyd/*of xfer*/);
3777 HReg fr_src = iselDblExpr(env, stmt->Ist.Store.data);
3778 addInstr(env,
3784 = iselWordExpr_AMode(env, stmt->Ist.Store.addr, tyd/*of xfer*/);
3785 HReg fr_src = iselFltExpr(env, stmt->Ist.Store.data);
3786 addInstr(env,
3792 = iselWordExpr_AMode(env, stmt->Ist.Store.addr, tyd/*of xfer*/);
3793 HReg v_src = iselVecExpr(env, stmt->Ist.Store.data);
3794 addInstr(env,
3803 HReg r_addr = iselWordExpr_R(env, stmt->Ist.Store.addr);
3804 iselInt64Expr( &rHi32, &rLo32, env, stmt->Ist.Store.data );
3805 addInstr(env, PPCInstr_Store( 4/*byte-store*/,
3809 addInstr(env, PPCInstr_Store( 4/*byte-store*/,
3820 IRType ty = typeOfIRExpr(env->type_env, stmt->Ist.Put.data);
3823 HReg r_src = iselWordExpr_R(env, stmt->Ist.Put.data);
3826 addInstr(env, PPCInstr_Store( toUChar(sizeofIRType(ty)),
3834 PPCAMode* am_addr4 = advance4(env, am_addr);
3835 iselInt64Expr(&rHi,&rLo, env, stmt->Ist.Put.data);
3836 addInstr(env, PPCInstr_Store( 4, am_addr, rHi, mode64 ));
3837 addInstr(env, PPCInstr_Store( 4, am_addr4, rLo, mode64 ));
3843 HReg v_src = iselVecExpr(env, stmt->Ist.Put.data);
3846 addInstr(env,
3851 HReg fr_src = iselDblExpr(env, stmt->Ist.Put.data);
3854 addInstr(env, PPCInstr_FpLdSt( False/*store*/, 8,
3865 env, stmt->Ist.PutI.descr,
3867 IRType ty = typeOfIRExpr(env->type_env, stmt->Ist.PutI.data);
3869 HReg r_src = iselWordExpr_R(env, stmt->Ist.PutI.data);
3870 addInstr(env, PPCInstr_Store( toUChar(8),
3875 HReg r_src = iselWordExpr_R(env, stmt->Ist.PutI.data);
3876 addInstr(env, PPCInstr_Store( toUChar(4),
3886 IRType ty = typeOfIRTemp(env->type_env, tmp);
3889 HReg r_dst = lookupIRTemp(env, tmp);
3890 HReg r_src = iselWordExpr_R(env, stmt->Ist.WrTmp.data);
3891 addInstr(env, mk_iMOVds_RR( r_dst, r_src ));
3896 iselInt64Expr(&r_srcHi,&r_srcLo, env, stmt->Ist.WrTmp.data);
3897 lookupIRTempPair( &r_dstHi, &r_dstLo, env, tmp);
3898 addInstr(env, mk_iMOVds_RR(r_dstHi, r_srcHi) );
3899 addInstr(env, mk_iMOVds_RR(r_dstLo, r_srcLo) );
3904 iselInt128Expr(&r_srcHi,&r_srcLo, env, stmt->Ist.WrTmp.data);
3905 lookupIRTempPair( &r_dstHi, &r_dstLo, env, tmp);
3906 addInstr(env, mk_iMOVds_RR(r_dstHi, r_srcHi) );
3907 addInstr(env, mk_iMOVds_RR(r_dstLo, r_srcLo) );
3911 PPCCondCode cond = iselCondCode(env, stmt->Ist.WrTmp.data);
3912 HReg r_dst = lookupIRTemp(env, tmp);
3913 addInstr(env, PPCInstr_Set(cond, r_dst));
3917 HReg fr_dst = lookupIRTemp(env, tmp);
3918 HReg fr_src = iselDblExpr(env, stmt->Ist.WrTmp.data);
3919 addInstr(env, PPCInstr_FpUnary(Pfp_MOV, fr_dst, fr_src));
3923 HReg fr_dst = lookupIRTemp(env, tmp);
3924 HReg fr_src = iselFltExpr(env, stmt->Ist.WrTmp.data);
3925 addInstr(env, PPCInstr_FpUnary(Pfp_MOV, fr_dst, fr_src));
3929 HReg v_dst = lookupIRTemp(env, tmp);
3930 HReg v_src = iselVecExpr(env, stmt->Ist.WrTmp.data);
3931 addInstr(env, PPCInstr_AvUnary(Pav_MOV, v_dst, v_src));
3940 IRType tyRes = typeOfIRTemp(env->type_env, res);
3941 IRType tyAddr = typeOfIRExpr(env->type_env, stmt->Ist.LLSC.addr);
3952 HReg r_addr = iselWordExpr_R( env, stmt->Ist.LLSC.addr );
3953 HReg r_dst = lookupIRTemp(env, res);
3955 addInstr(env, PPCInstr_LoadL( 4, r_dst, r_addr, mode64 ));
3959 addInstr(env, PPCInstr_LoadL( 8, r_dst, r_addr, mode64 ));
3965 HReg r_res = lookupIRTemp(env, res); /* :: Ity_I1 */
3966 HReg r_a = iselWordExpr_R(env, stmt->Ist.LLSC.addr);
3967 HReg r_src = iselWordExpr_R(env, stmt->Ist.LLSC.storedata);
3968 HReg r_tmp = newVRegI(env);
3969 IRType tyData = typeOfIRExpr(env->type_env,
3973 addInstr(env, PPCInstr_StoreC( tyData==Ity_I32 ? 4 : 8,
3975 addInstr(env, PPCInstr_MfCR( r_tmp ));
3976 addInstr(env, PPCInstr_Shft(
3978 env->mode64 ? False : True
3986 addInstr(env, PPCInstr_Alu(
4009 doHelperCall( env, passBBP, d->guard, d->cee, d->args );
4016 retty = typeOfIRTemp(env->type_env, d->tmp);
4021 lookupIRTempPair( &r_dstHi, &r_dstLo, env, d->tmp);
4022 addInstr(env, mk_iMOVds_RR(r_dstHi, hregPPC_GPR3(mode64)));
4023 addInstr(env, mk_iMOVds_RR(r_dstLo, hregPPC_GPR4(mode64)));
4030 HReg r_dst = lookupIRTemp(env, d->tmp);
4031 addInstr(env, mk_iMOVds_RR(r_dst, hregPPC_GPR3(mode64)));
4041 addInstr(env, PPCInstr_MFence());
4073 ri_dst = iselWordExpr_RI(env, IRExpr_Const(stmt->Ist.Exit.dst));
4074 cc = iselCondCode(env,stmt->Ist.Exit.guard);
4075 addInstr(env, PPCInstr_RdWrLR(True, env->savedLR));
4076 addInstr(env, PPCInstr_Goto(stmt->Ist.Exit.jk, cc, ri_dst));
4092 static void iselNext ( ISelEnv* env, IRExpr* next, IRJumpKind jk )
4104 ri = iselWordExpr_RI(env, next);
4105 addInstr(env, PPCInstr_RdWrLR(True, env->savedLR));
4106 addInstr(env, PPCInstr_Goto(jk, cond, ri));
4122 ISelEnv* env;
4144 env = LibVEX_Alloc(sizeof(ISelEnv));
4145 env->vreg_ctr = 0;
4148 env->mode64 = mode64;
4151 env->code = newHInstrArray();
4153 /* Copy BB's type env. */
4154 env->type_env = bb->tyenv;
4158 env->n_vregmap = bb->tyenv->types_used;
4159 env->vregmap = LibVEX_Alloc(env->n_vregmap * sizeof(HReg));
4160 env->vregmapHI = LibVEX_Alloc(env->n_vregmap * sizeof(HReg));
4163 env->hwcaps = hwcaps_host;
4164 env->previous_rm = NULL;
4165 env->vbi = vbi;
4170 for (i = 0; i < env->n_vregmap; i++) {
4195 env->vregmap[i] = hreg;
4196 env->vregmapHI[i] = hregHI;
4198 env->vreg_ctr = j;
4201 env->savedLR = newVRegI(env);
4202 addInstr(env, PPCInstr_RdWrLR(False, env->savedLR));
4207 iselStmt(env,bb->stmts[i]);
4209 iselNext(env,bb->next,bb->jumpkind);
4212 env->code->n_vregs = env->vreg_ctr;
4213 return env->code;
