| /external/llvm/lib/Target/Blackfin/ |
| BlackfinFrameLowering.cpp | 47 const BlackfinRegisterInfo *RegInfo =
63 RegInfo->adjustRegister(MBB, MBBI, dl, BF::SP, BF::P1, -FrameSize);
85 RegInfo->loadConstant(MBB, MBBI, dl, BF::P1, -FrameSize);
95 const BlackfinRegisterInfo *RegInfo =
108 RegInfo->adjustRegister(MBB, MBBI, dl, BF::SP, BF::P1, FrameSize);
120 const BlackfinRegisterInfo *RegInfo =
124 if (RegInfo->requiresRegisterScavenging(MF)) {
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.h | 141 const SystemZRegisterInfo *RegInfo;
|
| SystemZISelLowering.cpp | 46 RegInfo = TM.getRegisterInfo();
292 MachineRegisterInfo &RegInfo = MF.getRegInfo();
329 unsigned VReg = RegInfo.createVirtualRegister(RC);
330 RegInfo.addLiveIn(VA.getLocReg(), VReg);
[all...] |
| /external/llvm/lib/Target/Alpha/ |
| AlphaInstrInfo.cpp | 348 MachineRegisterInfo &RegInfo = MF->getRegInfo();
351 GlobalBaseReg = RegInfo.createVirtualRegister(&Alpha::GPRCRegClass);
354 RegInfo.addLiveIn(Alpha::R29);
373 MachineRegisterInfo &RegInfo = MF->getRegInfo();
376 GlobalRetAddr = RegInfo.createVirtualRegister(&Alpha::GPRCRegClass);
379 RegInfo.addLiveIn(Alpha::R26);
|
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeInstrInfo.cpp | 286 MachineRegisterInfo &RegInfo = MF->getRegInfo();
289 GlobalBaseReg = RegInfo.createVirtualRegister(MBlaze::GPRRegisterClass);
292 RegInfo.addLiveIn(MBlaze::R20);
|
| /external/llvm/lib/Target/Sparc/ |
| SparcInstrInfo.cpp | 336 MachineRegisterInfo &RegInfo = MF->getRegInfo();
338 GlobalBaseReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass);
|
| SparcISelLowering.cpp | 158 MachineRegisterInfo &RegInfo = MF.getRegInfo();
186 unsigned VRegHi = RegInfo.createVirtualRegister(&SP::IntRegsRegClass);
212 unsigned VReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass);
324 unsigned VReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass);
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| FunctionLoweringInfo.h | 60 MachineRegisterInfo *RegInfo;
|
| MachineFunction.h | 81 // RegInfo - Information about each register in use in the function.
82 MachineRegisterInfo *RegInfo;
154 MachineRegisterInfo &getRegInfo() { return *RegInfo; }
155 const MachineRegisterInfo &getRegInfo() const { return *RegInfo; }
|
| SelectionDAGISel.h | 47 MachineRegisterInfo *RegInfo;
|
| /external/llvm/lib/Target/ARM/ |
| Thumb1FrameLowering.cpp | 52 const Thumb1RegisterInfo *RegInfo =
61 unsigned FramePtr = RegInfo->getFrameRegister(MF);
62 unsigned BasePtr = RegInfo->getBaseRegister();
74 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -VARegSaveSize,
79 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes,
147 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes,
162 if (RegInfo->hasBasePointer(MF))
205 const Thumb1RegisterInfo *RegInfo =
212 const unsigned *CSRegs = RegInfo->getCalleeSavedRegs();
213 unsigned FramePtr = RegInfo->getFrameRegister(MF)
[all...] |
| ARMFrameLowering.cpp | 32 const TargetRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo();
41 RegInfo->needsStackRealignment(MF) ||
123 const ARMBaseRegisterInfo *RegInfo =
134 unsigned FramePtr = RegInfo->getFrameRegister(MF);
255 if (RegInfo->needsStackRealignment(MF)) {
289 if (RegInfo->hasBasePointer(MF)) {
292 TII.get(ARM::MOVr), RegInfo->getBaseRegister())
297 RegInfo->getBaseRegister())
317 const TargetRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo();
326 unsigned FramePtr = RegInfo->getFrameRegister(MF)
[all...] |
| ARMAsmPrinter.cpp | [all...] |
| ARMISelLowering.h | 358 const TargetRegisterInfo *RegInfo;
|
| /external/llvm/lib/Target/Mips/ |
| MipsFrameLowering.cpp | 142 const MipsRegisterInfo *RegInfo =
170 .addReg(RegInfo->getPICCallReg());
220 const unsigned *SubRegs = RegInfo->getSubRegisters(Reg);
|
| MipsInstrInfo.cpp | 451 MachineRegisterInfo &RegInfo = MF->getRegInfo();
454 GlobalBaseReg = RegInfo.createVirtualRegister(Mips::CPURegsRegisterClass);
457 RegInfo.addLiveIn(Mips::GP);
|
| MipsISelLowering.cpp | 733 MachineRegisterInfo &RegInfo = MF->getRegInfo();
742 unsigned StoreVal = RegInfo.createVirtualRegister(RC);
743 unsigned AndRes = RegInfo.createVirtualRegister(RC);
744 unsigned Success = RegInfo.createVirtualRegister(RC);
806 MachineRegisterInfo &RegInfo = MF->getRegInfo();
815 unsigned AlignedAddr = RegInfo.createVirtualRegister(RC);
816 unsigned ShiftAmt = RegInfo.createVirtualRegister(RC);
817 unsigned Mask = RegInfo.createVirtualRegister(RC);
818 unsigned Mask2 = RegInfo.createVirtualRegister(RC);
819 unsigned NewVal = RegInfo.createVirtualRegister(RC)
[all...] |
| /external/llvm/lib/CodeGen/ |
| PrologEpilogInserter.cpp | 147 const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
194 RegInfo->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I);
202 const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
207 const unsigned *CSRegs = RegInfo->getCalleeSavedRegs(&Fn);
228 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
250 const TargetRegisterClass *RC = RegInfo->getMinimalPhysRegClass(Reg);
253 if (RegInfo->hasReservedSpillSlot(Fn, Reg, FrameIdx)) {
562 const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
563 if (RS && TFI.hasFP(Fn) && RegInfo->useFPForScavengingIndex(Fn) &&
564 !RegInfo->needsStackRealignment(Fn))
[all...] |
| MachineBasicBlock.cpp | 74 // Make sure the instructions have their operands in the reginfo lists.
75 MachineRegisterInfo &RegInfo = MF.getRegInfo();
77 I->AddRegOperandsToUseLists(RegInfo);
|
| RegAllocGreedy.cpp | 103 // RegInfo - Keep additional information about each live range.
104 struct RegInfo {
110 RegInfo() : Stage(RS_New), Cascade(0) {}
113 IndexedMap<RegInfo, VirtReg2IndexFunctor> ExtraRegInfo;
[all...] |
| MachineInstr.cpp | 52 void MachineOperand::AddRegOperandToRegInfo(MachineRegisterInfo *RegInfo) {
55 // If the reginfo pointer is null, just explicitly null out or next/prev
57 if (RegInfo == 0) {
64 MachineOperand **Head = &RegInfo->getRegUseDefListHead(getReg());
597 void MachineInstr::AddRegOperandsToUseLists(MachineRegisterInfo &RegInfo) {
600 Operands[i].AddRegOperandToRegInfo(&RegInfo);
614 MachineRegisterInfo *RegInfo = getRegInfo();
629 Operands.back().AddRegOperandToRegInfo(RegInfo);
644 if (RegInfo == 0) {
645 // Simple insertion, no reginfo update needed for other register operands
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreFrameLowering.cpp | 95 const XCoreRegisterInfo *RegInfo =
120 bool emitFrameMoves = RegInfo->needsFrameMoves(MF);
342 const TargetRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo();
361 if (RegInfo->requiresRegisterScavenging(MF)) {
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 311 MachineRegisterInfo &RegInfo = MF.getRegInfo();
337 RegInfo.createVirtualRegister(MSP430::GR16RegisterClass);
338 RegInfo.addLiveIn(VA.getLocReg(), VReg);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCFrameLowering.cpp | 737 const TargetRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo();
741 unsigned LR = RegInfo->getRARegister();
774 if (RegInfo->requiresRegisterScavenging(MF)) // FIXME (64-bit): Enable.
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.h | 705 const X86RegisterInfo *RegInfo;
[all...] |
