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    Searched defs:RegNo (Results 1 - 12 of 12) sorted by null

  /external/llvm/lib/Target/X86/AsmParser/
X86AsmLexer.cpp 106 int RegNo = -1;
108 case '0': RegNo = X86::DR0; break;
109 case '1': RegNo = X86::DR1; break;
110 case '2': RegNo = X86::DR2; break;
111 case '3': RegNo = X86::DR3; break;
112 case '4': RegNo = X86::DR4; break;
113 case '5': RegNo = X86::DR5; break;
114 case '6': RegNo = X86::DR6; break;
115 case '7': RegNo = X86::DR7; break;
118 if (RegNo != -1)
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X86AsmParser.cpp 84 virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
121 unsigned RegNo;
159 return Reg.RegNo;
307 static X86Operand *CreateReg(unsigned RegNo, SMLoc StartLoc, SMLoc EndLoc) {
309 Res->Reg.RegNo = RegNo;
373 bool X86ATTAsmParser::ParseRegister(unsigned &RegNo,
375 RegNo = 0;
387 RegNo = MatchRegisterName(Tok.getString());
390 if (RegNo == 0
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  /external/llvm/lib/Target/PowerPC/InstPrinter/
PPCInstPrinter.cpp 29 void PPCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
30 OS << getRegisterName(RegNo);
169 unsigned RegNo;
172 case PPC::CR0: RegNo = 0; break;
173 case PPC::CR1: RegNo = 1; break;
174 case PPC::CR2: RegNo = 2; break;
175 case PPC::CR3: RegNo = 3; break;
176 case PPC::CR4: RegNo = 4; break;
177 case PPC::CR5: RegNo = 5; break;
178 case PPC::CR6: RegNo = 6; break
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  /external/llvm/utils/TableGen/
RegisterInfoEmitter.cpp 187 int RegNo = I->second[i];
192 << RegNo << ", ";
337 << " unsigned getSubReg(unsigned RegNo, unsigned Index) const;\n"
338 << " unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const;\n"
711 << "::getSubReg(unsigned RegNo, unsigned Index) const {\n"
712 << " switch (RegNo) {\n"
732 << "::getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const {\n"
733 << " switch (RegNo) {\n"
  /external/llvm/lib/Target/MBlaze/AsmParser/
MBlazeAsmParser.cpp 43 MBlazeOperand *ParseRegister(unsigned &RegNo);
48 virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
390 bool MBlazeAsmParser::ParseRegister(unsigned &RegNo,
392 return (ParseRegister(RegNo) == 0);
395 MBlazeOperand *MBlazeAsmParser::ParseRegister(unsigned &RegNo) {
402 RegNo = MatchRegisterName(getLexer().getTok().getIdentifier());
403 if (RegNo == 0)
407 return MBlazeOperand::CreateReg(RegNo, S, E);
463 unsigned RegNo;
464 Op = ParseRegister(RegNo);
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  /external/llvm/include/llvm/CodeGen/
MachineOperand.h 104 unsigned RegNo; // For MO_Register.
122 // Register number is in SmallContents.RegNo.
208 return SmallContents.RegNo;
479 Op.SmallContents.RegNo = Reg;
  /external/llvm/lib/Target/PowerPC/
PPCFrameLowering.cpp 112 unsigned RegNo = PPCRegisterInfo::getRegisterNumbering(I->first);
113 if (VRRegNo[RegNo] == I->first) // If this really is a vector reg.
114 UsedRegMask &= ~(1 << (31-RegNo)); // Doesn't need to be marked.
119 unsigned RegNo = PPCRegisterInfo::getRegisterNumbering(*I);
120 if (VRRegNo[RegNo] == *I) // If this really is a vector reg.
121 UsedRegMask &= ~(1 << (31-RegNo)); // Doesn't need to be marked.
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  /external/llvm/lib/Target/ARM/
ARMMCCodeEmitter.cpp 406 unsigned RegNo = getARMRegisterNumbering(Reg);
411 return RegNo;
416 return 2 * RegNo;
    [all...]
ARMBaseInstrInfo.cpp     [all...]
  /external/llvm/lib/CodeGen/AsmPrinter/
AsmPrinter.cpp 533 unsigned RegNo = MI->getOperand(0).getReg();
535 AP.TM.getRegisterInfo()->getName(RegNo));
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  /external/llvm/lib/MC/MCParser/
AsmParser.cpp     [all...]
  /external/llvm/lib/Target/ARM/AsmParser/
ARMAsmParser.cpp 51 virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
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