1 //===--- CGRecordLayout.h - LLVM Record Layout Information ------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #ifndef CLANG_CODEGEN_CGRECORDLAYOUT_H 11 #define CLANG_CODEGEN_CGRECORDLAYOUT_H 12 13 #include "llvm/ADT/DenseMap.h" 14 #include "llvm/DerivedTypes.h" 15 #include "clang/AST/CharUnits.h" 16 #include "clang/AST/Decl.h" 17 namespace llvm { 18 class raw_ostream; 19 class StructType; 20 } 21 22 namespace clang { 23 namespace CodeGen { 24 25 /// \brief Helper object for describing how to generate the code for access to a 26 /// bit-field. 27 /// 28 /// This structure is intended to describe the "policy" of how the bit-field 29 /// should be accessed, which may be target, language, or ABI dependent. 30 class CGBitFieldInfo { 31 public: 32 /// Descriptor for a single component of a bit-field access. The entire 33 /// bit-field is constituted of a bitwise OR of all of the individual 34 /// components. 35 /// 36 /// Each component describes an accessed value, which is how the component 37 /// should be transferred to/from memory, and a target placement, which is how 38 /// that component fits into the constituted bit-field. The pseudo-IR for a 39 /// load is: 40 /// 41 /// %0 = gep %base, 0, FieldIndex 42 /// %1 = gep (i8*) %0, FieldByteOffset 43 /// %2 = (i(AccessWidth) *) %1 44 /// %3 = load %2, align AccessAlignment 45 /// %4 = shr %3, FieldBitStart 46 /// 47 /// and the composed bit-field is formed as the boolean OR of all accesses, 48 /// masked to TargetBitWidth bits and shifted to TargetBitOffset. 49 struct AccessInfo { 50 /// Offset of the field to load in the LLVM structure, if any. 51 unsigned FieldIndex; 52 53 /// Byte offset from the field address, if any. This should generally be 54 /// unused as the cleanest IR comes from having a well-constructed LLVM type 55 /// with proper GEP instructions, but sometimes its use is required, for 56 /// example if an access is intended to straddle an LLVM field boundary. 57 CharUnits FieldByteOffset; 58 59 /// Bit offset in the accessed value to use. The width is implied by \see 60 /// TargetBitWidth. 61 unsigned FieldBitStart; 62 63 /// Bit width of the memory access to perform. 64 unsigned AccessWidth; 65 66 /// The alignment of the memory access, or 0 if the default alignment should 67 /// be used. 68 // 69 // FIXME: Remove use of 0 to encode default, instead have IRgen do the right 70 // thing when it generates the code, if avoiding align directives is 71 // desired. 72 CharUnits AccessAlignment; 73 74 /// Offset for the target value. 75 unsigned TargetBitOffset; 76 77 /// Number of bits in the access that are destined for the bit-field. 78 unsigned TargetBitWidth; 79 }; 80 81 private: 82 /// The components to use to access the bit-field. We may need up to three 83 /// separate components to support up to i64 bit-field access (4 + 2 + 1 byte 84 /// accesses). 85 // 86 // FIXME: De-hardcode this, just allocate following the struct. 87 AccessInfo Components[3]; 88 89 /// The total size of the bit-field, in bits. 90 unsigned Size; 91 92 /// The number of access components to use. 93 unsigned NumComponents; 94 95 /// Whether the bit-field is signed. 96 bool IsSigned : 1; 97 98 public: 99 CGBitFieldInfo(unsigned Size, unsigned NumComponents, AccessInfo *_Components, 100 bool IsSigned) : Size(Size), NumComponents(NumComponents), 101 IsSigned(IsSigned) { 102 assert(NumComponents <= 3 && "invalid number of components!"); 103 for (unsigned i = 0; i != NumComponents; ++i) 104 Components[i] = _Components[i]; 105 106 // Check some invariants. 107 unsigned AccessedSize = 0; 108 for (unsigned i = 0, e = getNumComponents(); i != e; ++i) { 109 const AccessInfo &AI = getComponent(i); 110 AccessedSize += AI.TargetBitWidth; 111 112 // We shouldn't try to load 0 bits. 113 assert(AI.TargetBitWidth > 0); 114 115 // We can't load more bits than we accessed. 116 assert(AI.FieldBitStart + AI.TargetBitWidth <= AI.AccessWidth); 117 118 // We shouldn't put any bits outside the result size. 119 assert(AI.TargetBitWidth + AI.TargetBitOffset <= Size); 120 } 121 122 // Check that the total number of target bits matches the total bit-field 123 // size. 124 assert(AccessedSize == Size && "Total size does not match accessed size!"); 125 } 126 127 public: 128 /// \brief Check whether this bit-field access is (i.e., should be sign 129 /// extended on loads). 130 bool isSigned() const { return IsSigned; } 131 132 /// \brief Get the size of the bit-field, in bits. 133 unsigned getSize() const { return Size; } 134 135 /// @name Component Access 136 /// @{ 137 138 unsigned getNumComponents() const { return NumComponents; } 139 140 const AccessInfo &getComponent(unsigned Index) const { 141 assert(Index < getNumComponents() && "Invalid access!"); 142 return Components[Index]; 143 } 144 145 /// @} 146 147 void print(llvm::raw_ostream &OS) const; 148 void dump() const; 149 150 /// \brief Given a bit-field decl, build an appropriate helper object for 151 /// accessing that field (which is expected to have the given offset and 152 /// size). 153 static CGBitFieldInfo MakeInfo(class CodeGenTypes &Types, const FieldDecl *FD, 154 uint64_t FieldOffset, uint64_t FieldSize); 155 156 /// \brief Given a bit-field decl, build an appropriate helper object for 157 /// accessing that field (which is expected to have the given offset and 158 /// size). The field decl should be known to be contained within a type of at 159 /// least the given size and with the given alignment. 160 static CGBitFieldInfo MakeInfo(CodeGenTypes &Types, const FieldDecl *FD, 161 uint64_t FieldOffset, uint64_t FieldSize, 162 uint64_t ContainingTypeSizeInBits, 163 unsigned ContainingTypeAlign); 164 }; 165 166 /// CGRecordLayout - This class handles struct and union layout info while 167 /// lowering AST types to LLVM types. 168 /// 169 /// These layout objects are only created on demand as IR generation requires. 170 class CGRecordLayout { 171 friend class CodeGenTypes; 172 173 CGRecordLayout(const CGRecordLayout&); // DO NOT IMPLEMENT 174 void operator=(const CGRecordLayout&); // DO NOT IMPLEMENT 175 176 private: 177 /// The LLVM type corresponding to this record layout; used when 178 /// laying it out as a complete object. 179 llvm::StructType *CompleteObjectType; 180 181 /// The LLVM type for the non-virtual part of this record layout; 182 /// used when laying it out as a base subobject. 183 llvm::StructType *BaseSubobjectType; 184 185 /// Map from (non-bit-field) struct field to the corresponding llvm struct 186 /// type field no. This info is populated by record builder. 187 llvm::DenseMap<const FieldDecl *, unsigned> FieldInfo; 188 189 /// Map from (bit-field) struct field to the corresponding llvm struct type 190 /// field no. This info is populated by record builder. 191 llvm::DenseMap<const FieldDecl *, CGBitFieldInfo> BitFields; 192 193 // FIXME: Maybe we could use a CXXBaseSpecifier as the key and use a single 194 // map for both virtual and non virtual bases. 195 llvm::DenseMap<const CXXRecordDecl *, unsigned> NonVirtualBases; 196 197 /// Map from virtual bases to their field index in the complete object. 198 llvm::DenseMap<const CXXRecordDecl *, unsigned> CompleteObjectVirtualBases; 199 200 /// False if any direct or indirect subobject of this class, when 201 /// considered as a complete object, requires a non-zero bitpattern 202 /// when zero-initialized. 203 bool IsZeroInitializable : 1; 204 205 /// False if any direct or indirect subobject of this class, when 206 /// considered as a base subobject, requires a non-zero bitpattern 207 /// when zero-initialized. 208 bool IsZeroInitializableAsBase : 1; 209 210 public: 211 CGRecordLayout(llvm::StructType *CompleteObjectType, 212 llvm::StructType *BaseSubobjectType, 213 bool IsZeroInitializable, 214 bool IsZeroInitializableAsBase) 215 : CompleteObjectType(CompleteObjectType), 216 BaseSubobjectType(BaseSubobjectType), 217 IsZeroInitializable(IsZeroInitializable), 218 IsZeroInitializableAsBase(IsZeroInitializableAsBase) {} 219 220 /// \brief Return the "complete object" LLVM type associated with 221 /// this record. 222 llvm::StructType *getLLVMType() const { 223 return CompleteObjectType; 224 } 225 226 /// \brief Return the "base subobject" LLVM type associated with 227 /// this record. 228 llvm::StructType *getBaseSubobjectLLVMType() const { 229 return BaseSubobjectType; 230 } 231 232 /// \brief Check whether this struct can be C++ zero-initialized 233 /// with a zeroinitializer. 234 bool isZeroInitializable() const { 235 return IsZeroInitializable; 236 } 237 238 /// \brief Check whether this struct can be C++ zero-initialized 239 /// with a zeroinitializer when considered as a base subobject. 240 bool isZeroInitializableAsBase() const { 241 return IsZeroInitializableAsBase; 242 } 243 244 /// \brief Return llvm::StructType element number that corresponds to the 245 /// field FD. 246 unsigned getLLVMFieldNo(const FieldDecl *FD) const { 247 assert(!FD->isBitField() && "Invalid call for bit-field decl!"); 248 assert(FieldInfo.count(FD) && "Invalid field for record!"); 249 return FieldInfo.lookup(FD); 250 } 251 252 unsigned getNonVirtualBaseLLVMFieldNo(const CXXRecordDecl *RD) const { 253 assert(NonVirtualBases.count(RD) && "Invalid non-virtual base!"); 254 return NonVirtualBases.lookup(RD); 255 } 256 257 /// \brief Return the LLVM field index corresponding to the given 258 /// virtual base. Only valid when operating on the complete object. 259 unsigned getVirtualBaseIndex(const CXXRecordDecl *base) const { 260 assert(CompleteObjectVirtualBases.count(base) && "Invalid virtual base!"); 261 return CompleteObjectVirtualBases.lookup(base); 262 } 263 264 /// \brief Return the BitFieldInfo that corresponds to the field FD. 265 const CGBitFieldInfo &getBitFieldInfo(const FieldDecl *FD) const { 266 assert(FD->isBitField() && "Invalid call for non bit-field decl!"); 267 llvm::DenseMap<const FieldDecl *, CGBitFieldInfo>::const_iterator 268 it = BitFields.find(FD); 269 assert(it != BitFields.end() && "Unable to find bitfield info"); 270 return it->second; 271 } 272 273 void print(llvm::raw_ostream &OS) const; 274 void dump() const; 275 }; 276 277 } // end namespace CodeGen 278 } // end namespace clang 279 280 #endif 281
