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    Searched defs:getReg (Results 1 - 24 of 24) sorted by null

  /external/llvm/include/llvm/MC/
MachineLocation.h 52 unsigned getReg() const { return Register; }
MCInst.h 57 /// getReg - Returns the register number.
58 unsigned getReg() const {
  /dalvik/dx/src/com/android/dx/ssa/
DeadCodeRemover.java 108 useList[source.getReg()].remove(insnS);
112 source.getReg()))) {
117 worklist.set(source.getReg());
154 useList[source.getReg()].remove(insn);
160 for (SsaInsn use : useList[result.getReg()]) {
204 || !isCircularNoSideEffect(result.getReg(), set)) {
252 noSideEffectRegs.set(insn.getResult().getReg());
260 noSideEffectRegs.set(phi.getResult().getReg());
268 noSideEffectRegs.set(result.getReg());
PhiTypeResolver.java 102 worklist.set(resultReg.getReg());
EscapeAnalysis.java 129 if (e.regSet.get(reg.getReg())) {
232 escSet = new EscapeSet(result.getReg(), regCount, EscapeState.NONE);
238 escSet = new EscapeSet(result.getReg(), regCount, EscapeState.NONE);
263 escSet = new EscapeSet(result.getReg(), regCount,
272 escSet = new EscapeSet(result.getReg(), regCount,
277 escSet = new EscapeSet(result.getReg(), regCount,
283 escSet = new EscapeSet(result.getReg(), regCount,
296 escSet.regSet.set(result.getReg());
302 escSet = new EscapeSet(result.getReg(), regCount,
305 escSet = new EscapeSet(result.getReg(), regCount
    [all...]
SsaBasicBlock.java 577 if (result.getReg() == source.getReg()) {
633 if (result.getReg() == source.getReg()) {
655 regsUsed.set(rs.getReg());
657 regsUsed.set(rs.getReg() + 1);
671 int reg = rs.getReg();
913 = firstNonPhiMoveInsn.getResult().getReg();
    [all...]
  /dalvik/dx/src/com/android/dx/cf/code/
OneLocalsArray.java 137 set(spec.getReg(), spec);
LocalsArraySet.java 211 set(spec.getReg(), spec);
  /external/llvm/lib/CodeGen/
LiveRangeEdit.h 107 unsigned getReg() const { return parent_.reg; }
134 return createFrom(getReg(), LIS, VRM);
  /dalvik/dx/src/com/android/dx/ssa/back/
FirstFitLocalCombiningAllocator.java 168 regs.append(reg.getReg());
188 int ssaReg = ssaSpec.getReg();
253 if (!ssaRegsMapped.get(ssaSpec.getReg())
288 if (ssaRegsMapped.get(spec.getReg())) {
316 && !ssaRegsMapped.get(ssaSpec.getReg())
459 int moveReg = moveRegSpec.getReg();
481 int checkReg = checkRegSpec.getReg();
578 if (ssaRegsMapped.get(spec.getReg())) continue;
692 int ssaReg = ssaSpec.getReg();
702 ssaSpec.getReg(), ropReg, ssaSpec.getCategory())
    [all...]
  /dalvik/dexgen/src/com/android/dexgen/rop/code/
RegisterSpec.java 321 public int getReg() {
437 if ((other == null) || (reg != other.getReg())) {
  /dalvik/dx/src/com/android/dx/rop/code/
RegisterSpec.java 326 public int getReg() {
442 if ((other == null) || (reg != other.getReg())) {
  /external/llvm/include/llvm/CodeGen/
CallingConvLower.h 67 static CCValAssign getReg(unsigned ValNo, MVT ValVT,
85 Ret = getReg(ValNo, ValVT, RegNo, LocVT, HTP);
MachineFrameInfo.h 43 unsigned getReg() const { return Reg; }
MachineOperand.h 205 /// getReg - Returns the register number.
206 unsigned getReg() const {
ScheduleDAG.h 199 /// getReg - Return the register associated with this edge. This is
202 unsigned getReg() const {
204 "getReg called on non-register dependence edge!");
SelectionDAGNodes.h     [all...]
  /external/llvm/lib/Target/MBlaze/AsmParser/
MBlazeAsmParser.cpp 144 unsigned getReg() const {
192 Inst.addOperand(MCOperand::CreateReg(getReg()));
289 OS << MBlazeRegisterInfo::getRegisterNumbering(getReg()) << ">";
379 Op = MBlazeOperand::CreateMem(Base.getReg(), Offset.getReg(), S, E);
381 Op = MBlazeOperand::CreateMem(Base.getReg(), Offset.getImm(), S, E);
  /external/llvm/utils/TableGen/
CodeGenRegisters.cpp 62 CodeGenRegister *SR = RegBank.getReg(SubList[i]);
74 CodeGenRegister *SR = RegBank.getReg(SubList[i]);
278 Members.insert(RegBank.getReg((*Elements)[i]));
289 CodeGenRegister *Reg = RegBank.getReg(Order.back());
377 getReg(Regs[i]);
385 getReg((*TupRegs)[j]);
398 CodeGenRegister *CodeGenRegBank::getReg(Record *Def) {
546 CodeGenRegister *Reg2 = getReg(RegList[i2]);
581 const CodeGenRegister *Reg = getReg(R);
DAGISelMatcher.h 827 const CodeGenRegister *getReg() const { return Reg; }
    [all...]
  /external/llvm/lib/Target/X86/AsmParser/
X86AsmParser.cpp 157 unsigned getReg() const {
278 Inst.addOperand(MCOperand::CreateReg(getReg()));
792 if (Op.isReg() && Op.getReg() == X86::DX && isDstOp(Op2)) {
805 if (isSrcOp(Op) && Op2.isReg() && Op2.getReg() == X86::DX) {
834 unsigned reg = Op2->getReg();
864 unsigned reg = Op1->getReg();
    [all...]
  /dalvik/vm/analysis/
CodeVerify.cpp     [all...]
  /external/llvm/lib/Target/ARM/AsmParser/
ARMAsmParser.cpp 308 unsigned getReg() const {
569 Inst.addOperand(MCOperand::CreateReg(getReg()));
574 Inst.addOperand(MCOperand::CreateReg(getReg()));
959 OS << "<ccout " << getReg() << ">";
1011 OS << "<register " << getReg() << ">"
    [all...]
  /prebuilt/sdk/tools/lib/
dx.jar 

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