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      1 //===-- FunctionLoweringInfo.h - Lower functions from LLVM IR to CodeGen --===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This implements routines for translating functions from LLVM IR into
     11 // Machine IR.
     12 //
     13 //===----------------------------------------------------------------------===//
     14 
     15 #ifndef LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
     16 #define LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
     17 
     18 #include "llvm/InlineAsm.h"
     19 #include "llvm/Instructions.h"
     20 #include "llvm/ADT/APInt.h"
     21 #include "llvm/ADT/DenseMap.h"
     22 #include "llvm/ADT/IndexedMap.h"
     23 #include "llvm/ADT/SmallVector.h"
     24 #ifndef NDEBUG
     25 #include "llvm/ADT/SmallSet.h"
     26 #endif
     27 #include "llvm/Analysis/BranchProbabilityInfo.h"
     28 #include "llvm/CodeGen/ValueTypes.h"
     29 #include "llvm/CodeGen/ISDOpcodes.h"
     30 #include "llvm/CodeGen/MachineBasicBlock.h"
     31 #include "llvm/Support/CallSite.h"
     32 #include "llvm/Target/TargetRegisterInfo.h"
     33 #include <vector>
     34 
     35 namespace llvm {
     36 
     37 class AllocaInst;
     38 class BasicBlock;
     39 class CallInst;
     40 class Function;
     41 class GlobalVariable;
     42 class Instruction;
     43 class MachineInstr;
     44 class MachineBasicBlock;
     45 class MachineFunction;
     46 class MachineModuleInfo;
     47 class MachineRegisterInfo;
     48 class TargetLowering;
     49 class Value;
     50 
     51 //===--------------------------------------------------------------------===//
     52 /// FunctionLoweringInfo - This contains information that is global to a
     53 /// function that is used when lowering a region of the function.
     54 ///
     55 class FunctionLoweringInfo {
     56 public:
     57   const TargetLowering &TLI;
     58   const Function *Fn;
     59   MachineFunction *MF;
     60   MachineRegisterInfo *RegInfo;
     61   BranchProbabilityInfo *BPI;
     62   /// CanLowerReturn - true iff the function's return value can be lowered to
     63   /// registers.
     64   bool CanLowerReturn;
     65 
     66   /// DemoteRegister - if CanLowerReturn is false, DemoteRegister is a vreg
     67   /// allocated to hold a pointer to the hidden sret parameter.
     68   unsigned DemoteRegister;
     69 
     70   /// MBBMap - A mapping from LLVM basic blocks to their machine code entry.
     71   DenseMap<const BasicBlock*, MachineBasicBlock *> MBBMap;
     72 
     73   /// ValueMap - Since we emit code for the function a basic block at a time,
     74   /// we must remember which virtual registers hold the values for
     75   /// cross-basic-block values.
     76   DenseMap<const Value*, unsigned> ValueMap;
     77 
     78   /// StaticAllocaMap - Keep track of frame indices for fixed sized allocas in
     79   /// the entry block.  This allows the allocas to be efficiently referenced
     80   /// anywhere in the function.
     81   DenseMap<const AllocaInst*, int> StaticAllocaMap;
     82 
     83   /// ByValArgFrameIndexMap - Keep track of frame indices for byval arguments.
     84   DenseMap<const Argument*, int> ByValArgFrameIndexMap;
     85 
     86   /// ArgDbgValues - A list of DBG_VALUE instructions created during isel for
     87   /// function arguments that are inserted after scheduling is completed.
     88   SmallVector<MachineInstr*, 8> ArgDbgValues;
     89 
     90   /// RegFixups - Registers which need to be replaced after isel is done.
     91   DenseMap<unsigned, unsigned> RegFixups;
     92 
     93   /// MBB - The current block.
     94   MachineBasicBlock *MBB;
     95 
     96   /// MBB - The current insert position inside the current block.
     97   MachineBasicBlock::iterator InsertPt;
     98 
     99 #ifndef NDEBUG
    100   SmallSet<const Instruction *, 8> CatchInfoLost;
    101   SmallSet<const Instruction *, 8> CatchInfoFound;
    102 #endif
    103 
    104   struct LiveOutInfo {
    105     unsigned NumSignBits : 31;
    106     bool IsValid : 1;
    107     APInt KnownOne, KnownZero;
    108     LiveOutInfo() : NumSignBits(0), IsValid(true), KnownOne(1, 0),
    109                     KnownZero(1, 0) {}
    110   };
    111 
    112   /// VisitedBBs - The set of basic blocks visited thus far by instruction
    113   /// selection.
    114   DenseSet<const BasicBlock*> VisitedBBs;
    115 
    116   /// PHINodesToUpdate - A list of phi instructions whose operand list will
    117   /// be updated after processing the current basic block.
    118   /// TODO: This isn't per-function state, it's per-basic-block state. But
    119   /// there's no other convenient place for it to live right now.
    120   std::vector<std::pair<MachineInstr*, unsigned> > PHINodesToUpdate;
    121 
    122   explicit FunctionLoweringInfo(const TargetLowering &TLI);
    123 
    124   /// set - Initialize this FunctionLoweringInfo with the given Function
    125   /// and its associated MachineFunction.
    126   ///
    127   void set(const Function &Fn, MachineFunction &MF);
    128 
    129   /// clear - Clear out all the function-specific state. This returns this
    130   /// FunctionLoweringInfo to an empty state, ready to be used for a
    131   /// different function.
    132   void clear();
    133 
    134   /// isExportedInst - Return true if the specified value is an instruction
    135   /// exported from its block.
    136   bool isExportedInst(const Value *V) {
    137     return ValueMap.count(V);
    138   }
    139 
    140   unsigned CreateReg(EVT VT);
    141 
    142   unsigned CreateRegs(Type *Ty);
    143 
    144   unsigned InitializeRegForValue(const Value *V) {
    145     unsigned &R = ValueMap[V];
    146     assert(R == 0 && "Already initialized this value register!");
    147     return R = CreateRegs(V->getType());
    148   }
    149 
    150   /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
    151   /// register is a PHI destination and the PHI's LiveOutInfo is not valid.
    152   const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg) {
    153     if (!LiveOutRegInfo.inBounds(Reg))
    154       return NULL;
    155 
    156     const LiveOutInfo *LOI = &LiveOutRegInfo[Reg];
    157     if (!LOI->IsValid)
    158       return NULL;
    159 
    160     return LOI;
    161   }
    162 
    163   /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
    164   /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If
    165   /// the register's LiveOutInfo is for a smaller bit width, it is extended to
    166   /// the larger bit width by zero extension. The bit width must be no smaller
    167   /// than the LiveOutInfo's existing bit width.
    168   const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth);
    169 
    170   /// AddLiveOutRegInfo - Adds LiveOutInfo for a register.
    171   void AddLiveOutRegInfo(unsigned Reg, unsigned NumSignBits,
    172                          const APInt &KnownZero, const APInt &KnownOne) {
    173     // Only install this information if it tells us something.
    174     if (NumSignBits == 1 && KnownZero == 0 && KnownOne == 0)
    175       return;
    176 
    177     LiveOutRegInfo.grow(Reg);
    178     LiveOutInfo &LOI = LiveOutRegInfo[Reg];
    179     LOI.NumSignBits = NumSignBits;
    180     LOI.KnownOne = KnownOne;
    181     LOI.KnownZero = KnownZero;
    182   }
    183 
    184   /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination
    185   /// register based on the LiveOutInfo of its operands.
    186   void ComputePHILiveOutRegInfo(const PHINode*);
    187 
    188   /// InvalidatePHILiveOutRegInfo - Invalidates a PHI's LiveOutInfo, to be
    189   /// called when a block is visited before all of its predecessors.
    190   void InvalidatePHILiveOutRegInfo(const PHINode *PN) {
    191     // PHIs with no uses have no ValueMap entry.
    192     DenseMap<const Value*, unsigned>::const_iterator It = ValueMap.find(PN);
    193     if (It == ValueMap.end())
    194       return;
    195 
    196     unsigned Reg = It->second;
    197     LiveOutRegInfo.grow(Reg);
    198     LiveOutRegInfo[Reg].IsValid = false;
    199   }
    200 
    201   /// setByValArgumentFrameIndex - Record frame index for the byval
    202   /// argument.
    203   void setByValArgumentFrameIndex(const Argument *A, int FI);
    204 
    205   /// getByValArgumentFrameIndex - Get frame index for the byval argument.
    206   int getByValArgumentFrameIndex(const Argument *A);
    207 
    208 private:
    209   /// LiveOutRegInfo - Information about live out vregs.
    210   IndexedMap<LiveOutInfo, VirtReg2IndexFunctor> LiveOutRegInfo;
    211 };
    212 
    213 /// AddCatchInfo - Extract the personality and type infos from an eh.selector
    214 /// call, and add them to the specified machine basic block.
    215 void AddCatchInfo(const CallInst &I,
    216                   MachineModuleInfo *MMI, MachineBasicBlock *MBB);
    217 
    218 /// CopyCatchInfo - Copy catch information from SuccBB (or one of its
    219 /// successors) to LPad.
    220 void CopyCatchInfo(const BasicBlock *SuccBB, const BasicBlock *LPad,
    221                    MachineModuleInfo *MMI, FunctionLoweringInfo &FLI);
    222 
    223 } // end namespace llvm
    224 
    225 #endif
    226