| /external/llvm/lib/CodeGen/ |
| ProcessImplicitDefs.cpp | 124 if (MO.isKill()) {
146 bool isKill = MO.isKill();
150 if (isKill) {
168 if (MO.isKill() || MI->isRegTiedToDefOperand(i)) {
245 bool isKill = false;
251 if (RRMO.isKill())
252 isKill = true;
262 if (isKill) {
272 bool isKill = true
[all...] |
| MachineLICM.cpp | 596 return MO.isKill() || MRI->hasOneNonDBGUse(MO.getReg());
634 bool isKill = isOperandKill(MO, MRI);
635 if (isNew && !isKill)
638 else if (!isNew && isKill)
[all...] |
| MachineVerifier.cpp | 617 bool isKill = false;
623 isKill = true;
629 isKill = MO->isKill();
631 if (isKill)
636 MO->isKill()) {
655 if (MO->isKill() && !LI.killedAt(UseIdx.getDefIndex())) {
[all...] |
| VirtRegMap.h | 320 void addSpillPoint(unsigned virtReg, bool isKill, MachineInstr *Pt) {
324 I->second.push_back(std::make_pair(virtReg, isKill));
327 Virts.push_back(std::make_pair(virtReg, isKill));
341 bool isKill = I->second.back().second;
343 addSpillPoint(virtReg, isKill, New);
|
| TwoAddressInstructionPass.cpp | 214 if (!UseMO.isKill())
252 if (MO.isKill()) {
777 if (MO.isUse() && MO.isKill())
[all...] |
| LiveIntervalAnalysis.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.cpp | 306 bool isKill = Op.hasOneUse() &&
310 if (isKill) {
317 isKill = false;
321 false/*isImp*/, isKill,
[all...] |
| /external/llvm/lib/Target/ARM/ |
| Thumb1FrameLowering.cpp | 301 bool isKill = true;
310 isKill = false;
313 if (isKill)
316 MIB.addReg(Reg, getKillRegState(isKill));
|
| Thumb1RegisterInfo.cpp | 269 bool isKill = BaseReg != ARM::SP;
273 MIB.addReg(BaseReg, getKillRegState(isKill)).addImm(ThisVal);
|
| ARMFrameLowering.cpp | 559 bool isKill = true;
563 isKill = false;
566 if (isKill)
575 Regs.push_back(std::make_pair(Reg, isKill));
[all...] |
| ARMBaseInstrInfo.cpp | 242 if (MO.isUse() && MO.isKill()) {
670 unsigned SrcReg, bool isKill, int FI,
695 .addReg(SrcReg, getKillRegState(isKill))
700 .addReg(SrcReg, getKillRegState(isKill))
707 .addReg(SrcReg, getKillRegState(isKill))
716 .addReg(SrcReg, getKillRegState(isKill))
720 .addReg(SrcReg, getKillRegState(isKill))
732 .addReg(SrcReg, getKillRegState(isKill))
739 MIB = AddDReg(MIB, SrcReg, ARM::dsub_0, getKillRegState(isKill), TRI);
750 MIB = AddDReg(MIB, SrcReg, ARM::dsub_0, getKillRegState(isKill), TRI)
[all...] |
| ARMLoadStoreOptimizer.cpp | 78 bool isKill;
84 : Offset(o), Reg(r), isKill(k), Position(p), MBBI(i), Merged(false) {}
387 if (memOps[i].Position < insertPos && memOps[i].isKill) {
399 bool isKill = memOps[i].isKill || KilledRegs.count(Reg);
400 Regs.push_back(std::make_pair(Reg, isKill));
421 memOps[j].isKill = false;
423 memOps[i].isKill = true;
685 bool BaseKill = MI->getOperand(0).isKill();
823 bool BaseKill = MI->getOperand(1).isKill();
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreRegisterInfo.cpp | 220 bool isKill = MI.getOpcode() == XCore::STWFI && MI.getOperand(0).isKill();
245 .addReg(Reg, getKillRegState(isKill))
266 .addReg(Reg, getKillRegState(isKill))
295 .addReg(Reg, getKillRegState(isKill))
|
| /external/llvm/include/llvm/CodeGen/ |
| MachineOperand.h | 67 /// IsDef/IsImp/IsKill/IsDead flags - These are only valid for MO_Register
78 /// IsKill - True if this instruction is the last use of the register on this
80 bool IsKill : 1;
236 bool isKill() const {
238 return IsKill;
309 IsKill = Val;
428 /// operand. Note: This method ignores isKill and isDead properties.
440 bool isKill = false, bool isDead = false,
466 bool isKill = false, bool isDead = false,
474 Op.IsKill = isKill
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.cpp | [all...] |
