| /frameworks/base/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
| armVCM4P10_InterpolateLuma_Copy_unsafe_s.S | 41 ORR r4,r4,r5,LSL #24
44 ORR r8,r8,r9,LSL #24
51 ORR r4,r4,r5,LSL #24
54 ORR r8,r8,r9,LSL #24
63 ORR r4,r4,r5,LSL #16
66 ORR r8,r8,r9,LSL #16
73 ORR r4,r4,r5,LSL #16
76 ORR r8,r8,r9,LSL #16
85 ORR r4,r4,r5,LSL #8
88 ORR r8,r8,r9,LSL #
[all...] |
| armVCM4P10_InterpolateLuma_Align_unsafe_s.S | 37 ORR r7,r7,r10,LSL #24
39 ORR r10,r10,r11,LSL #24
49 ORR r7,r7,r10,LSL #16
51 ORR r10,r10,r11,LSL #16
61 ORR r7,r7,r10,LSL #8
63 ORR r10,r10,r11,LSL #8
95 ORR r7,r10,r7,LSR #8
104 ORR r7,r10,r7,LSR #16
113 ORR r7,r10,r7,LSR #24
|
| armVCM4P10_InterpolateLuma_DiagCopy_unsafe_s.S | 37 ORR r11,r10,r11,LSL #8
38 ORR r10,r4,r5,LSL #8
71 ORR r11,r10,r11,LSL #8
72 ORR r10,r4,r5,LSL #8
93 ORR r11,r10,r11,LSL #8
94 ORR r10,r4,r5,LSL #8
|
| armVCM4P10_Average_4x_Align_unsafe_s.S | 59 ORR r10,r10,r4,LSL #16
61 ORR r11,r11,r5,LSL #16
77 ORR r10,r10,r4,LSL #16
79 ORR r11,r11,r5,LSL #16
103 ORR r10,r10,r4,LSL #8
105 ORR r11,r11,r5,LSL #8
121 ORR r10,r10,r4,LSL #8
123 ORR r11,r11,r5,LSL #8
|
| armVCM4P10_DecodeCoeffsToPair_s.S | 27 ORR r9,r9,r8,LSL #8
28 ORR r11,r9,r11,LSL #16
94 ORR r11,r8,r11,LSL #8
118 ORR r11,r8,r11,LSL #8
|
| /frameworks/base/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p10/src/ |
| armVCM4P10_Interpolate_Chroma_s.s | 122 ORR iWidth, iWidth, temp, LSL #16
153 ORR x01x00, x00, x01, LSL #16
155 ORR x02x01, x01, x02, LSL #16
157 ORR x11x10, x10, x11, LSL #16
158 ORR x12x11, x11, x12, LSL #16
180 ORR OutRow0100, OutRow00, OutRow01, LSL #8
190 ORR x21x20, x20, x21, LSL #16
191 ORR x22x21, x21, x22, LSL #16
207 ORR OutRow1110, OutRow10, OutRow11, LSL #8
222 ORR iWidth, iWidth, temp, LSL #1
[all...] |
| armVCM4P10_InterpolateLuma_Copy_unsafe_s.s | 78 ORR x0, x0, x1, LSL #24
81 ORR x2, x2, x3, LSL #24
88 ORR x0, x0, x1, LSL #24
91 ORR x2, x2, x3, LSL #24
101 ORR x0, x0, x1, LSL #16
104 ORR x2, x2, x3, LSL #16
112 ORR x0, x0, x1, LSL #16
115 ORR x2, x2, x3, LSL #16
125 ORR x0, x0, x1, LSL #8
128 ORR x2, x2, x3, LSL #
[all...] |
| armVCM4P10_InterpolateLuma_Align_unsafe_s.s | 94 ORR x0, x0, x1, LSL #24
96 ORR x1, x1, x2, LSL #24
110 ORR x0, x0, x1, LSL #16
112 ORR x1, x1, x2, LSL #16
126 ORR x0, x0, x1, LSL #8
128 ORR x1, x1, x2, LSL #8
195 ORR x0, x1, x0, LSR #8
208 ORR x0, x1, x0, LSR #16
221 ORR x0, x1, x0, LSR #24
|
| omxVCM4P10_PredictIntra_4x4_s.s | 310 ORR Out0, tVal6, tVal11 ;// {U3, f2, f1, f0 }
329 ORR tVal8, tVal8, Above4567, LSL #8 ;// {U6, U5, U4, U3 }
330 ORR tVal10, tVal10, Above4567, LSL #24 ;// {U4, U3, U2, U1 }
347 ORR Out3, tVal9, Out2, LSR #8 ;// {f6, f5, f4, f3 }
365 ORR tVal7, Left1, Left0, LSL #8 ;// tVal7 = 00 00 L0 L1
368 ORR tVal8, Left3, Left2, LSL #8 ;// tVal8 = 00 00 L2 L3
372 ORR tVal8, tVal8, AboveLeft ;// tVal8 = U2 U1 U0 UL
373 ORR tVal9, tVal9, AboveLeft, LSL #24 ;// tVal9 = UL L0 L1 L2
376 ORR tVal10, tVal10, tVal9, LSR #8 ;// tVal10= U0 UL L0 L1
377 ORR tVal11, tVal11, tVal8, LSL #8 ;// tVal11= U1 U0 UL L
[all...] |
| armVCM4P10_Average_4x_Align_unsafe_s.s | 129 ORR iPredA0, iPredA0, Temp1, LSL #16
131 ORR iPredA1, iPredA1, Temp2, LSL #16
151 ORR iPredA0, iPredA0, Temp1, LSL #16
153 ORR iPredA1, iPredA1, Temp2, LSL #16
185 ORR iPredA0, iPredA0, Temp1, LSL #8
187 ORR iPredA1, iPredA1, Temp2, LSL #8
206 ORR iPredA0, iPredA0, Temp1, LSL #8
208 ORR iPredA1, iPredA1, Temp2, LSL #8
|
| armVCM4P10_InterpolateLuma_DiagCopy_unsafe_s.s | 91 ORR ValueA1, Temp3, Temp4, LSL #8
92 ORR ValueA0, Temp1, Temp2, LSL #8
131 ORR ValueA1, Temp3, Temp4, LSL #8 ;// [d2 c2 d0 c0]
132 ORR ValueA0, Temp1, Temp2, LSL #8 ;// [b2 a2 b0 a0]
159 ORR ValueA1, Temp3, Temp4, LSL #8 ;// [d2 c2 d0 c0]
160 ORR ValueA0, Temp1, Temp2, LSL #8 ;// [b2 a2 b0 a0]
|
| omxVCM4P10_PredictIntra_16x16_s.s | 299 ORR sum, sum, sum, LSL #8 ;// sum replicated in two halfword
303 ORR tVal6, sum, sum, LSL #16 ;// sum replicated in all bytes
431 ORR tVal14, tVal14, tVal14, LSL #16 ;// tVal14 = {c , c}
435 ORR tVal0, tVal6, tVal1, LSL #16 ;// tval0 = p2p0 = pack {p2, p0}
438 ORR tVal12, tVal12, tVal12, LSL #16 ;// tVal12 = {b , b}
439 ORR tVal10, tVal10, tVal10, LSL #16 ;// tVal10 = {3b , 3b}
457 ORR temp1, temp1, temp2, LSL #8
466 ORR temp1, temp1, temp2, LSL #8
475 ORR temp1, temp1, temp2, LSL #8
484 ORR temp1, temp1, temp2, LSL #
[all...] |
| omxVCM4P10_PredictIntraChroma_8x8_s.s | 444 ORR c, c, c, LSL #16 ;// c c
448 ORR p2p0, tVal6, tVal2, LSL #16 ;// p2p0 = pack {p2, p0}
451 ORR b, b, b, LSL #16 ;// {b,b}
452 ORR tVal7, tVal7, tVal7, LSL #16 ;// {3b,3b}
472 ORR p3210, pp2pp0, pp3pp1, LSL #8 ;// pack {p3,p2, p1, p0}
475 ORR p7654, pp6pp4, pp7pp5, LSL #8 ;// pack {p7,p6, p5, p4}
|
| armVCM4P10_InterpolateLuma_HalfDiagVerHor4x4_unsafe_s.s | 261 ORR Acc0, Acc0, Acc1, LSL #8
262 ORR Acc2, Acc2, Acc3, LSL #8
264 ORR Acc0, Acc0, Acc2, LSL #16
|
| /frameworks/base/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/ |
| armVCM4P10_InterpolateLuma_Copy_unsafe_s.s | 78 ORR x0, x0, x1, LSL #24
81 ORR x2, x2, x3, LSL #24
88 ORR x0, x0, x1, LSL #24
91 ORR x2, x2, x3, LSL #24
101 ORR x0, x0, x1, LSL #16
104 ORR x2, x2, x3, LSL #16
112 ORR x0, x0, x1, LSL #16
115 ORR x2, x2, x3, LSL #16
125 ORR x0, x0, x1, LSL #8
128 ORR x2, x2, x3, LSL #
[all...] |
| armVCM4P10_InterpolateLuma_Align_unsafe_s.s | 94 ORR x0, x0, x1, LSL #24
96 ORR x1, x1, x2, LSL #24
110 ORR x0, x0, x1, LSL #16
112 ORR x1, x1, x2, LSL #16
126 ORR x0, x0, x1, LSL #8
128 ORR x1, x1, x2, LSL #8
195 ORR x0, x1, x0, LSR #8
208 ORR x0, x1, x0, LSR #16
221 ORR x0, x1, x0, LSR #24
|
| armVCM4P10_Average_4x_Align_unsafe_s.s | 129 ORR iPredA0, iPredA0, Temp1, LSL #16
131 ORR iPredA1, iPredA1, Temp2, LSL #16
151 ORR iPredA0, iPredA0, Temp1, LSL #16
153 ORR iPredA1, iPredA1, Temp2, LSL #16
185 ORR iPredA0, iPredA0, Temp1, LSL #8
187 ORR iPredA1, iPredA1, Temp2, LSL #8
206 ORR iPredA0, iPredA0, Temp1, LSL #8
208 ORR iPredA1, iPredA1, Temp2, LSL #8
|
| armVCM4P10_InterpolateLuma_DiagCopy_unsafe_s.s | 91 ORR ValueA1, Temp3, Temp4, LSL #8
92 ORR ValueA0, Temp1, Temp2, LSL #8
131 ORR ValueA1, Temp3, Temp4, LSL #8 ;// [d2 c2 d0 c0]
132 ORR ValueA0, Temp1, Temp2, LSL #8 ;// [b2 a2 b0 a0]
159 ORR ValueA1, Temp3, Temp4, LSL #8 ;// [d2 c2 d0 c0]
160 ORR ValueA0, Temp1, Temp2, LSL #8 ;// [b2 a2 b0 a0]
|
| /frameworks/base/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p2/src/ |
| omxVCM4P2_MCReconBlock_s.s | 101 ORR $out0, $out0, $out1, LSL #(32 - 8 * ($offset))
103 ORR $out1, $out1, $scratch, LSL #(32 - 8 * ($offset))
208 ORR $word3, $word3, $word2, LSL #24
210 ORR $word2, $word2, $word1, LSL #24
215 ORR $word0, $word0, $word2, LSL #8
217 ORR $word1, $word1, $word3, LSL #8
220 ORR $word0, $word0, $word1, LSL #(32 - 8 * ($offset))
222 ORR $word1, $word1, $word2, LSL #(32 - 8 * ($offset))
225 ORR $word3, $word3, $word2, LSL #(32 - 8 * (($offset)+1))
227 ORR $word2, $word2, $word1, LSL #2
[all...] |
| /frameworks/base/media/libstagefright/codecs/amrwbenc/src/asm/ARMV5E/ |
| residu_asm_opt.s | 37 ORR r5, r6, r5, LSL #16 @r5 --- a0, a1
41 ORR r6, r7, r6, LSL #16 @r6 --- a2, a3
45 ORR r7, r8, r7, LSL #16 @r7 --- a4, a5
49 ORR r8, r9, r8, LSL #16 @r8 --- a6, a7
53 ORR r9, r10, r9, LSL #16 @r9 --- a8, a9
57 ORR r10, r11, r10, LSL #16 @r10 --- a10, a11
61 ORR r11, r12, r11, LSL #16 @r11 --- a12, a13
65 ORR r12, r4, r12, LSL #16 @r12 --- a14, a15
73 ORR r14, r4, r14, LSL #16 @r14 --- loopnum, a16
|
| Syn_filt_32_opt.s | 56 ORR r10, r6, r7, LSL #16 @ Aq[2] -- Aq[1]
57 ORR r11, r8, r9, LSL #16 @ Aq[4] -- Aq[3]
67 ORR r10, r6, r7, LSL #16 @ Aq[6] -- Aq[5]
68 ORR r11, r8, r9, LSL #16 @ Aq[8] -- Aq[7]
78 ORR r10, r6, r7, LSL #16 @ Aq[10] -- Aq[9]
79 ORR r11, r8, r9, LSL #16 @ Aq[12] -- Aq[11]
89 ORR r10, r6, r7, LSL #16 @ Aq[14] -- Aq[13]
90 ORR r11, r8, r9, LSL #16 @ Aq[16] -- Aq[15]
|
| syn_filt_opt.s | 96 ORR r10, r6, r7, LSL #16 @ -a[2] -- -a[1]
97 ORR r12, r9, r11, LSL #16 @ -a[4] -- -a[3]
107 ORR r10, r6, r7, LSL #16 @ -a[6] -- -a[5]
108 ORR r12, r9, r11, LSL #16 @ -a[8] -- -a[7]
118 ORR r10, r6, r7, LSL #16 @ -a[10] -- -a[9]
119 ORR r12, r9, r11, LSL #16 @ -a[12] -- -a[11]
129 ORR r10, r6, r7, LSL #16 @ -a[14] -- -a[13]
130 ORR r12, r9, r11, LSL #16 @ -a[16] -- -a[15]
|
| /system/core/libpixelflinger/codeflinger/ |
| load_store.cpp | 84 ORR(AL, 0, s.reg, s.reg, reg_imm(s0, LSL, 8));
86 ORR(AL, 0, s.reg, s.reg, reg_imm(s0, LSL, 16));
91 ORR(AL, 0, s1, s1, reg_imm(s0, LSL, 8));
93 ORR(AL, 0, s.reg, s1, reg_imm(s0, LSL, 16));
223 ORR(AL, 0, d, d, reg_imm(d, LSR, sbits));
233 ORR(AL, 0, d, s, reg_imm(s, LSL, sbits));
361 ORR(AL, 0, d.reg, d.reg, reg_imm(ireg, LSL, dl));
367 ORR(AL, 0, d.reg, d.reg, reg_imm(s.reg, LSR, shift));
376 ORR(AL, 0, d.reg, d.reg, reg_imm(s.reg, LSR, shift));
382 ORR(AL, 0, d.reg, d.reg, reg_imm(s.reg, LSL, -shift))
[all...] |
| /frameworks/base/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/api/ |
| armCOMM_BitDec_s.h | 134 ORR $T2, $T2, $T1, LSL #8
135 ORR $BitBuffer, $T2, $BitBuffer, LSL #16
273 ORR $BitBuffer, $T1, $BitBuffer, LSL #8
|
| /frameworks/base/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/api/ |
| armCOMM_BitDec_s.h | 134 ORR $T2, $T2, $T1, LSL #8
135 ORR $BitBuffer, $T2, $BitBuffer, LSL #16
273 ORR $BitBuffer, $T1, $BitBuffer, LSL #8
|
