| /external/llvm/include/llvm/Target/ |
| TargetSelectionDAGInfo.h | 59 SDValue Op1, SDValue Op2,
76 SDValue Op1, SDValue Op2,
92 SDValue Op1, SDValue Op2,
|
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineMulDivRem.cpp | 101 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
103 if (Value *V = SimplifyMulInst(Op0, Op1, TD))
109 if (match(Op1, m_AllOnes())) // X * -1 == 0 - X
112 if (ConstantInt *CI = dyn_cast<ConstantInt>(Op1)) {
164 if (isa<Constant>(Op1)) {
176 if (Value *Op1v = dyn_castNegVal(Op1))
182 Value *Op1C = Op1;
188 BO = dyn_cast<BinaryOperator>(Op1);
220 return BinaryOperator::CreateAnd(Op0, Op1);
227 return BinaryOperator::CreateShl(Op1, Y)
[all...] |
| InstCombineShifts.cpp | 23 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
31 if (SelectInst *SI = dyn_cast<SelectInst>(Op1))
35 if (ConstantInt *CUI = dyn_cast<ConstantInt>(Op1))
43 if (Op1->hasOneUse() && match(Op1, m_SRem(m_Value(A), m_Power2(B)))) {
47 Op1->getName());
302 Instruction *InstCombiner::FoldShiftByConstant(Value *Op0, ConstantInt *Op1,
310 CanEvaluateShifted(Op0, Op1->getZExtValue(), isLeftShift, *this)) {
315 GetShiftedValue(Op0, Op1->getZExtValue(), isLeftShift, *this));
326 if (Op1->uge(TypeBits))
[all...] |
| InstCombineAddSub.cpp | 530 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
532 if (Value *V = SimplifySubInst(Op0, Op1, I.hasNoSignedWrap(),
541 if (Value *V = dyn_castNegVal(Op1)) {
549 return BinaryOperator::CreateXor(Op0, Op1);
553 return BinaryOperator::CreateNot(Op1);
558 if (match(Op1, m_Not(m_Value(X))))
565 if (match(Op1, m_LShr(m_Value(X), m_ConstantInt(CI))) &&
570 if (match(Op1, m_AShr(m_Value(X), m_ConstantInt(CI))) &&
577 if (SelectInst *SI = dyn_cast<SelectInst>(Op1))
582 if (ZExtInst *ZI = dyn_cast<ZExtInst>(Op1))
[all...] |
| InstCombineAndOrXor.cpp | 728 Value *Op0 = LHS->getOperand(0), *Op1 = LHS->getOperand(1);
731 return getICmpValue(isSigned, Code, Op0, Op1, Builder);
[all...] |
| InstCombineCompares.cpp | [all...] |
| InstructionCombining.cpp | 145 BinaryOperator *Op1 = dyn_cast<BinaryOperator>(I.getOperand(1));
169 if (Op1 && Op1->getOpcode() == Opcode) {
171 Value *B = Op1->getOperand(0);
172 Value *C = Op1->getOperand(1);
211 if (Op1 && Op1->getOpcode() == Opcode) {
213 Value *B = Op1->getOperand(0);
214 Value *C = Op1->getOperand(1);
232 if (Op0 && Op1 &
[all...] |
| /external/llvm/lib/Analysis/ |
| InstructionSimplify.cpp | 109 if (BinaryOperator *Op1 = dyn_cast<BinaryOperator>(RHS))
110 if (Op1->getOpcode() == OpcodeToExpand) {
112 Value *A = LHS, *B = Op1->getOperand(0), *C = Op1->getOperand(1);
148 BinaryOperator *Op1 = dyn_cast<BinaryOperator>(RHS);
151 !Op1 || Op1->getOpcode() != OpcodeToExtract)
156 Value *C = Op1->getOperand(0), *D = Op1->getOperand(1);
221 BinaryOperator *Op1 = dyn_cast<BinaryOperator>(RHS)
[all...] |
| ConstantFolding.cpp | 506 /// SymbolicallyEvaluateBinop - One of Op0/Op1 is a constant expression.
511 Constant *Op1, const TargetData *TD){
526 if (IsConstantOffsetFromGlobal(Op1, GV2, Offs2, *TD) &&
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMSelectionDAGInfo.h | 43 SDValue Op1, SDValue Op2,
|
| /external/llvm/include/llvm/CodeGen/ |
| FastISel.h | 165 unsigned Op1, bool Op1IsKill);
195 unsigned Op1, bool Op1IsKill,
242 unsigned Op1, bool Op1IsKill);
250 unsigned Op1, bool Op1IsKill,
283 unsigned Op1, bool Op1IsKill,
|
| SelectionDAG.h | 480 SDValue getCALLSEQ_END(SDValue Chain, SDValue Op1, SDValue Op2,
485 Ops.push_back(Op1);
690 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2);
691 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
693 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
695 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
705 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT, SDValue Op1);
707 SDValue Op1, SDValue Op2);
709 SDValue Op1, SDValue Op2, SDValue Op3);
721 EVT VT2, SDValue Op1);
[all...] |
| ISDOpcodes.h | [all...] |
| /external/llvm/include/llvm/Analysis/ |
| InstructionSimplify.h | 77 Value *SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW,
82 Value *SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact,
87 Value *SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact,
|
| /external/llvm/lib/Target/PTX/ |
| PTXISelLowering.cpp | 147 SDValue Op1 = Op.getOperand(1);
155 if (Op1.getOpcode() == ISD::Constant &&
156 (cast<ConstantSDNode>(Op1)->getZExtValue() == 1 ||
157 cast<ConstantSDNode>(Op1)->isNullValue()) &&
160 return DAG.getNode(ISD::AND, dl, MVT::i1, Op0, Op1);
163 return DAG.getNode(ISD::SETCC, dl, MVT::i1, Op0, Op1, Op2);
|
| PTXInstrInfo.h | 117 SDValue Op1);
121 SDValue Op1, SDValue Op2);
|
| PTXInstrInfo.cpp | 368 DebugLoc dl, EVT VT, SDValue Op1) {
371 SDValue ops[] = { Op1, predReg, predOp };
377 DebugLoc dl, EVT VT, SDValue Op1, SDValue Op2) {
380 SDValue ops[] = { Op1, Op2, predReg, predOp };
|
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelDAGToDAG.cpp | 270 SDValue Op0, Op1;
274 if (!SelectDFormAddr(Op.getNode(), Op, Op0, Op1)
275 && !SelectAFormAddr(Op.getNode(), Op, Op0, Op1))
276 SelectXFormAddr(Op.getNode(), Op, Op0, Op1);
279 if (!SelectDFormAddr(Op.getNode(), Op, Op0, Op1)
280 && !SelectAFormAddr(Op.getNode(), Op, Op0, Op1)) {
282 Op1 = getSmallIPtrImm(0);
289 SelectAddrIdxOnly(Op, Op, Op0, Op1);
295 OutOps.push_back(Op1);
422 const SDValue Op1 = N.getOperand(1)
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelDAGToDAG.cpp | 193 SDValue Op0, Op1;
197 if (!SelectADDRrr(Op, Op0, Op1))
198 SelectADDRri(Op, Op0, Op1);
203 OutOps.push_back(Op1);
|
| /external/llvm/lib/Transforms/Scalar/ |
| CorrelatedValuePropagation.cpp | 146 Constant *Op1 = dyn_cast<Constant>(C->getOperand(1));
147 if (!Op1) return false;
153 C->getOperand(0), Op1, *PI, C->getParent());
159 C->getOperand(0), Op1, *PI, C->getParent());
|
| /external/llvm/lib/Target/X86/AsmParser/ |
| X86AsmParser.cpp | 830 X86Operand *Op1 = static_cast<X86Operand*>(Operands[1]);
832 if (isSrcOp(*Op1) && Op2->isReg()) {
849 delete Op1;
860 X86Operand *Op1 = static_cast<X86Operand*>(Operands[1]);
862 if (isDstOp(*Op2) && Op1->isReg()) {
864 unsigned reg = Op1->getReg();
879 delete Op1;
894 X86Operand *Op1 = static_cast<X86Operand*>(Operands[1]);
895 if (Op1->isImm() && isa<MCConstantExpr>(Op1->getImm()) &
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | 377 SDValue Op1 = N->getOperand(1);
382 CurDAG->ComputeMaskedBits(Op1, APInt::getAllOnesValue(32), RKZ, RKO);
389 unsigned Op1Opc = Op1.getOpcode();
399 if (Op1.getOperand(0).getOpcode() != ISD::SHL &&
400 Op1.getOperand(0).getOpcode() != ISD::SRL) {
401 std::swap(Op0, Op1);
407 if (Op1Opc == ISD::AND && Op1.getOperand(0).getOpcode() != ISD::SHL &&
408 Op1.getOperand(0).getOpcode() != ISD::SRL) {
409 std::swap(Op0, Op1);
420 isInt32Immediate(Op1.getOperand(1), Value))
[all...] |
| /external/llvm/lib/ExecutionEngine/Interpreter/ |
| Execution.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86FloatingPoint.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| FastISel.cpp | 341 unsigned Op1 = getRegForValue(I->getOperand(1));
342 if (Op1 == 0) return false;
346 unsigned ResultReg = FastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1,
395 unsigned Op1 = getRegForValue(I->getOperand(1));
396 if (Op1 == 0)
406 Op1, Op1IsKill);
[all...] |
