| /external/llvm/lib/CodeGen/ |
| CallingConvLower.cpp | 88 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
91 for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
92 MVT VT = Outs[i].VT;
93 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
102 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
105 for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
106 MVT VT = Outs[i].VT;
107 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
120 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
122 unsigned NumOps = Outs.size()
[all...] |
| /external/llvm/lib/Target/Blackfin/ |
| BlackfinISelLowering.h | 68 const SmallVectorImpl<ISD::OutputArg> &Outs,
77 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| BlackfinISelLowering.cpp | 224 const SmallVectorImpl<ISD::OutputArg> &Outs,
236 CCInfo.AnalyzeReturn(Outs, RetCC_Blackfin);
283 const SmallVectorImpl<ISD::OutputArg> &Outs,
296 CCInfo.AnalyzeCallOperands(Outs, CC_Blackfin);
|
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.h | 83 const SmallVectorImpl<ISD::OutputArg> &Outs,
92 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| SparcISelLowering.cpp | 83 const SmallVectorImpl<ISD::OutputArg> &Outs,
97 CCInfo.AnalyzeReturn(Outs, RetCC_Sparc32);
352 const SmallVectorImpl<ISD::OutputArg> &Outs,
364 CCInfo.AnalyzeCallOperands(Outs, CC_Sparc32);
376 for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
377 ISD::ArgFlagsTy Flags = Outs[i].Flags;
410 ISD::ArgFlagsTy Flags = Outs[realArgIdx].Flags;
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.h | 128 const SmallVectorImpl<ISD::OutputArg> &Outs,
157 const SmallVectorImpl<ISD::OutputArg> &Outs,
166 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| MSP430ISelLowering.cpp | 274 const SmallVectorImpl<ISD::OutputArg> &Outs,
288 Outs, OutVals, Ins, dl, DAG, InVals);
384 const SmallVectorImpl<ISD::OutputArg> &Outs,
392 if (CallConv == CallingConv::MSP430_INTR && !Outs.empty()) {
402 CCInfo.AnalyzeReturn(Outs, RetCC_MSP430);
445 &Outs,
455 CCInfo.AnalyzeCallOperands(Outs, CC_MSP430);
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.h | 97 const SmallVectorImpl<ISD::OutputArg> &Outs,
126 const SmallVectorImpl<ISD::OutputArg> &Outs,
135 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| SystemZISelLowering.cpp | 257 const SmallVectorImpl<ISD::OutputArg> &Outs,
271 Outs, OutVals, Ins, dl, DAG, InVals);
376 &Outs,
392 CCInfo.AnalyzeCallOperands(Outs, CC_SystemZ);
555 const SmallVectorImpl<ISD::OutputArg> &Outs,
567 CCInfo.AnalyzeReturn(Outs, RetCC_SystemZ);
[all...] |
| /external/llvm/lib/Target/Alpha/ |
| AlphaISelLowering.h | 127 const SmallVectorImpl<ISD::OutputArg> &Outs,
136 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| AlphaISelLowering.cpp | 226 const SmallVectorImpl<ISD::OutputArg> &Outs,
239 CCInfo.AnalyzeCallOperands(Outs, CC_Alpha);
472 const SmallVectorImpl<ISD::OutputArg> &Outs,
480 switch (Outs.size()) {
487 EVT ArgVT = Outs[0].VT;
502 EVT ArgVT = Outs[0].VT;
[all...] |
| /external/llvm/lib/Target/PTX/ |
| PTXISelLowering.h | 58 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| PTXISelLowering.cpp | 291 const SmallVectorImpl<ISD::OutputArg> &Outs,
301 assert(Outs.size() == 0 && "Kernel must return void.");
304 //assert(Outs.size() <= 1 && "Can at most return one value.");
321 CCInfo.AnalyzeReturn(Outs, RetCC_PTX);
|
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelLowering.h | 166 const SmallVectorImpl<ISD::OutputArg> &Outs,
175 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeISelLowering.h | 138 const SmallVectorImpl<ISD::OutputArg> &Outs,
147 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.h | 146 const SmallVectorImpl<ISD::OutputArg> &Outs,
155 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.h | 120 const SmallVectorImpl<ISD::OutputArg> &Outs,
180 const SmallVectorImpl<ISD::OutputArg> &Outs,
189 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| XCoreISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.h | 441 const SmallVectorImpl<ISD::OutputArg> &Outs,
450 const SmallVectorImpl<ISD::OutputArg> &Outs,
470 const SmallVectorImpl<ISD::OutputArg> &Outs,
478 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| PPCISelLowering.cpp | [all...] |
| /external/llvm/include/llvm/CodeGen/ |
| CallingConvLower.h | 201 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
212 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| FunctionLoweringInfo.cpp | 67 SmallVector<ISD::OutputArg, 4> Outs;
69 Fn->getAttributes().getRetAttributes(), Outs, TLI);
72 Outs, Fn->getContext());
|
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.h | 441 const SmallVectorImpl<ISD::OutputArg> &Outs,
458 const SmallVectorImpl<ISD::OutputArg> &Outs,
465 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.h | 753 const SmallVectorImpl<ISD::OutputArg> &Outs,
[all...] |
| X86FastISel.cpp | 704 SmallVector<ISD::OutputArg, 4> Outs;
706 Outs, TLI);
712 CCInfo.AnalyzeReturn(Outs, RetCC_X86);
745 if (!Outs[0].Flags.isZExt() && !Outs[0].Flags.isSExt())
751 if (Outs[0].Flags.isSExt())
756 unsigned Op = Outs[0].Flags.isZExt() ? ISD::ZERO_EXTEND :
[all...] |
