/prebuilt/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/sys/ |
reg.h | 28 # define R15 0
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/bionic/libc/kernel/arch-x86/asm/ |
ptrace-abi.h | 39 #define R15 0
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/development/ndk/platforms/android-9/arch-x86/include/asm/ |
ptrace-abi.h | 39 #define R15 0
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/external/kernel-headers/original/asm-x86/ |
ptrace-abi.h | 28 #define R15 0
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/prebuilt/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/asm/ |
ptrace-abi.h | 28 #define R15 0
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/prebuilt/ndk/android-ndk-r4/platforms/android-5/arch-x86/usr/include/asm/ |
ptrace-abi.h | 39 #define R15 0
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/prebuilt/ndk/android-ndk-r4/platforms/android-8/arch-x86/usr/include/asm/ |
ptrace-abi.h | 39 #define R15 0
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/prebuilt/ndk/android-ndk-r6/platforms/android-9/arch-x86/usr/include/asm/ |
ptrace-abi.h | 39 #define R15 0
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/external/llvm/lib/Target/Alpha/ |
AlphaFrameLowering.cpp | 96 .addReg(Alpha::R15).addImm(0).addReg(Alpha::R30); 98 BuildMI(MBB, MBBI, dl, TII.get(Alpha::BISr), Alpha::R15) 123 BuildMI(MBB, MBBI, dl, TII.get(Alpha::BISr), Alpha::R30).addReg(Alpha::R15) 124 .addReg(Alpha::R15); 126 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDQ), Alpha::R15) 127 .addImm(0).addReg(Alpha::R15);
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AlphaRegisterInfo.cpp | 73 Reserved.set(Alpha::R15); 148 // Add the base register of R30 (SP) or R15 (FP). 149 MI.getOperand(i + 1).ChangeToRegister(FP ? Alpha::R15 : Alpha::R30, false); 172 .addImm(getUpper16(Offset)).addReg(FP ? Alpha::R15 : Alpha::R30); 182 return TFI->hasFP(MF) ? Alpha::R15 : Alpha::R30;
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/external/llvm/lib/Target/MBlaze/MCTargetDesc/ |
MBlazeMCTargetDesc.cpp | 45 InitMBlazeMCRegisterInfo(X, MBlaze::R15);
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/external/llvm/lib/Target/MBlaze/ |
MBlazeRegisterInfo.cpp | 46 : MBlazeGenRegisterInfo(MBlaze::R15), Subtarget(ST), TII(tii) {} 67 case MBlaze::R15 : return 15; 132 case 15 : return MBlaze::R15; 235 Reserved.set(MBlaze::R15);
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MBlazeISelDAGToDAG.cpp | 235 SDValue GPReg = CurDAG->getRegister(MBlaze::R15, MVT::i32);
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MBlazeFrameLowering.cpp | 370 // swi R15, R1, stack_loc 373 .addReg(MBlaze::R15).addReg(MBlaze::R1).addImm(RAOffset); 414 // lwi R15, R1, stack_loc 416 BuildMI(MBB, MBBI, dl, TII.get(MBlaze::LWI), MBlaze::R15)
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MBlazeISelLowering.cpp | [all...] |
/external/llvm/lib/Target/X86/ |
X86RegisterInfo.cpp | 86 case X86::ESI: case X86::R15: return 5; 104 case X86::R15: case X86::R15D: case X86::R15W: case X86::R15B: 338 X86::RBX, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, 0 343 X86::R13, X86::R14, X86::R15, X86::RBP, 0 348 X86::R12, X86::R13, X86::R14, X86::R15, 410 X86::R12, X86::R13, X86::R14, X86::R15 688 case X86::R15B: case X86::R15W: case X86::R15D: case X86::R15: 725 case X86::R15B: case X86::R15W: case X86::R15D: case X86::R15: 761 case X86::R15B: case X86::R15W: case X86::R15D: case X86::R15: 797 case X86::R15B: case X86::R15W: case X86::R15D: case X86::R15 [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCFrameLowering.h | 170 {PPC::R15, -68}, 249 {PPC::R15, -132},
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PPCRegisterInfo.cpp | 91 case R15: case X15: case F15: case V15: case CR3UN: return 15; 149 PPC::R13, PPC::R14, PPC::R15, 175 PPC::R14, PPC::R15,
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/system/core/libpixelflinger/codeflinger/ |
ARMAssemblerInterface.h | 50 R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, 53 PC = R15 59 LIST(R13), LIST(R14), LIST(R15),
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/external/valgrind/main/VEX/auxprogs/ |
genoffsets.c | 114 GENOFFSET(AMD64,amd64,R15);
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/external/llvm/lib/Target/X86/Disassembler/ |
X86DisassemblerDecoder.h | 176 ENTRY(R15) 194 ENTRY(R15)
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/external/llvm/lib/Target/X86/MCTargetDesc/ |
X86MCTargetDesc.cpp | 156 case X86::R15: case X86::R15D: case X86::R15W: case X86::R15B: 228 case X86::R15: case X86::R15D: case X86::R15W: case X86::R15B:
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/external/llvm/lib/Target/CellSPU/ |
SPURegisterInfo.cpp | 69 case SPU::R15: return 15;
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/external/valgrind/main/coregrind/m_sigframe/ |
sigframe-amd64-linux.c | 351 SC2(r15,R15); 584 tst->arch.vex.guest_R15 = sc->r15;
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/external/v8/src/ |
platform-linux.cc | 832 enum ArmRegisters {R15 = 15, R13 = 13, R11 = 11}; 883 sample->pc = reinterpret_cast<Address>(mcontext.gregs[R15]);
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