/external/llvm/lib/Target/X86/ |
X86Subtarget.h | 45 NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42 56 /// X86SSELevel - MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, or 153 bool hasSSE3() const { return X86SSELevel >= SSE3; }
|
X86Subtarget.cpp | 192 if (ECX & 0x1) X86SSELevel = SSE3; ToggleFeature(X86::FeatureSSE3);
|
/external/v8/src/ia32/ |
code-stubs-ia32.h | 83 use_sse3_ = CpuFeatures::IsSupported(SSE3);
|
assembler-ia32.h | 460 if (f == SSE3 && !FLAG_enable_sse3) return false; 895 // The fisttp instructions require SSE3. [all...] |
assembler-ia32.cc | [all...] |
lithium-ia32.cc | [all...] |
lithium-codegen-ia32.cc | [all...] |
stub-cache-ia32.cc | [all...] |
code-stubs-ia32.cc | [all...] |
/external/v8/src/ |
v8globals.h | 464 SSE3 = 32 + 0, // x86
|
/external/clang/lib/Basic/ |
Targets.cpp | [all...] |
/external/oprofile/events/x86-64/family10/ |
unit_masks | 68 0x04 SSE instructions (SSE, SSE2, SSE3, and SSE4A)
|
/external/v8/src/x64/ |
assembler-x64.cc | [all...] |
assembler-x64.h | 431 // if (CpuFeatures::IsSupported(SSE3)) { 432 // CpuFeatures::Scope fscope(SSE3); 433 // // Generate SSE3 floating point code. 447 if (f == SSE3 && !FLAG_enable_sse3) return false; [all...] |