| /external/icu4c/layout/ |
| LigatureSubstProc.cpp | 20 #define SignBit(m) ((ExtendedComplement(m) >> 1) & (le_int32)(m))
21 #define SignExtend(v,m) (((v) & SignBit(m))? ((v) | ExtendedComplement(m)): (v))
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeFloatTypes.cpp | 179 SDValue SignBit = DAG.getNode(ISD::SHL, dl, RVT, DAG.getConstant(1, RVT),
182 SignBit = DAG.getNode(ISD::AND, dl, RVT, RHS, SignBit);
187 SignBit = DAG.getNode(ISD::SRL, dl, RVT, SignBit,
189 TLI.getShiftAmountTy(SignBit.getValueType())));
190 SignBit = DAG.getNode(ISD::TRUNCATE, dl, LVT, SignBit);
192 SignBit = DAG.getNode(ISD::ANY_EXTEND, dl, LVT, SignBit);
[all...] |
| LegalizeDAG.cpp | [all...] |
| TargetLowering.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| SelectionDAG.cpp | [all...] |
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineSimplifyDemanded.cpp | 668 APInt SignBit(APInt::getSignBit(BitWidth));
670 SignBit = APIntOps::lshr(SignBit, ShiftAmt);
680 } else if ((KnownOne & SignBit) != 0) { // New bits are known one.
[all...] |
| InstCombineCompares.cpp | [all...] |
| /external/llvm/lib/Support/ |
| APInt.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
