| /external/llvm/lib/Target/X86/ |
| X86MCCodeEmitter.cpp | 113 uint64_t TSFlags, unsigned &CurByte, raw_ostream &OS,
119 void EmitVEXOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, int MemOperand,
123 void EmitSegmentOverridePrefix(uint64_t TSFlags, unsigned &CurByte,
127 void EmitOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, int MemOperand,
148 /// in an instruction with the specified TSFlags.
149 static MCFixupKind getImmFixupKind(uint64_t TSFlags) {
150 unsigned Size = X86II::getSizeOfImm(TSFlags);
151 bool isPCRel = X86II::isImmPCRel(TSFlags);
237 uint64_t TSFlags, unsigned &CurByte,
265 int ImmSize = X86II::hasImm(TSFlags) ? X86II::getSizeOfImm(TSFlags) : 0
[all...] |
| X86CodeEmitter.cpp | 154 if ((Desc.TSFlags & X86II::FormMask) == X86II::Pseudo)
156 if (Desc.TSFlags & X86II::REX_W)
175 switch (Desc.TSFlags & X86II::FormMask) {
616 if (Desc->TSFlags & X86II::LOCK)
620 switch (Desc->TSFlags & X86II::SegOvrMask) {
632 if ((Desc->TSFlags & X86II::Op0Mask) == X86II::REP)
636 if (Desc->TSFlags & X86II::OpSize)
640 if (Desc->TSFlags & X86II::AdSize)
644 switch (Desc->TSFlags & X86II::Op0Mask) {
668 (((Desc->TSFlags & X86II::Op0Mask)-X86II::D8
[all...] |
| X86InstrInfo.h | 493 static inline unsigned char getBaseOpcodeFor(uint64_t TSFlags) {
494 return TSFlags >> X86II::OpcodeShift;
497 static inline bool hasImm(uint64_t TSFlags) {
498 return (TSFlags & X86II::ImmMask) != 0;
501 /// getSizeOfImm - Decode the "size of immediate" field from the TSFlags field
503 static inline unsigned getSizeOfImm(uint64_t TSFlags) {
504 switch (TSFlags & X86II::ImmMask) {
517 /// TSFlags indicates that it is pc relative.
518 static inline unsigned isImmPCRel(uint64_t TSFlags) {
519 switch (TSFlags & X86II::ImmMask)
[all...] |
| X86FloatingPoint.cpp | 400 uint64_t Flags = MI->getDesc().TSFlags;
[all...] |
| X86InstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/ARM/Disassembler/ |
| ARMDisassemblerCore.h | 170 static inline bool isUnaryDP(uint64_t TSFlags) {
171 return (TSFlags & ARMII::UnaryDP);
175 static inline bool isNEONDomain(uint64_t TSFlags) {
176 return (TSFlags & ARMII::DomainNEON) ||
177 (TSFlags & ARMII::DomainNEONA8);
182 static inline unsigned getAddrMode(uint64_t TSFlags) {
183 return (TSFlags & ARMII::AddrModeMask);
189 static inline unsigned getIndexMode(uint64_t TSFlags) {
190 return (TSFlags & ARMII::IndexModeMask) >> ARMII::IndexModeShift;
194 static inline bool isPrePostLdSt(uint64_t TSFlags) {
[all...] |
| ARMDisassemblerCore.cpp | 746 (MCID.TSFlags & ARMII::IndexModeMask) >> ARMII::IndexModeShift;
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMHazardRecognizer.cpp | 23 unsigned Domain = MCID.TSFlags & ARMII::DomainMask;
47 if (LastMI && (MCID.TSFlags & ARMII::DomainMask) != ARMII::DomainGeneral) {
54 (LastMCID.TSFlags & ARMII::DomainMask) == ARMII::DomainGeneral) {
|
| ARMCodeEmitter.cpp | 466 unsigned Reloc = ((MCID.TSFlags & ARMII::FormMask) == ARMII::VFPLdStFrm)
546 switch (MI.getDesc().TSFlags & ARMII::FormMask) {
[all...] |
| NEONMoveFix.cpp | 72 Domain = DefMI->second->getDesc().TSFlags & ARMII::DomainMask;
|
| MLxExpansionPass.cpp | 141 unsigned Domain = MCID.TSFlags & ARMII::DomainMask;
284 unsigned Domain = MCID.TSFlags & ARMII::DomainMask;
|
| ARMBaseInstrInfo.cpp | 123 uint64_t TSFlags = MI->getDesc().TSFlags;
125 switch ((TSFlags & ARMII::IndexModeMask) >> ARMII::IndexModeShift) {
142 unsigned AddrMode = (TSFlags & ARMII::AddrModeMask);
506 if ((MCID.TSFlags & ARMII::DomainMask) == ARMII::DomainNEON) {
[all...] |
| ARMBaseRegisterInfo.cpp | 948 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask);
[all...] |
| ARMMCCodeEmitter.cpp | [all...] |
| Thumb2InstrInfo.cpp | 389 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask);
|
| Thumb1RegisterInfo.cpp | 397 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask);
|
| ARMFrameLowering.cpp | 813 switch (I->getDesc().TSFlags & ARMII::AddrModeMask) {
[all...] |
| ARMFastISel.cpp | 240 if ((MCID.TSFlags & ARMII::DomainMask) != ARMII::DomainNEON ||
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCHazardRecognizers.cpp | 81 uint64_t TSFlags = MCID.TSFlags;
83 isFirst = TSFlags & PPCII::PPC970_First;
84 isSingle = TSFlags & PPCII::PPC970_Single;
85 isCracked = TSFlags & PPCII::PPC970_Cracked;
86 return (PPCII::PPC970_Unit)(TSFlags & PPCII::PPC970_Mask);
|
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeMCCodeEmitter.cpp | 182 uint64_t TSFlags = Desc.TSFlags;
189 switch ((TSFlags & MBlazeII::FormMask)) {
|
| /external/llvm/include/llvm/MC/ |
| MCInstrDesc.h | 140 uint64_t TSFlags; // Target Specific Flag values
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430InstrInfo.cpp | 301 switch (Desc.TSFlags & MSP430II::SizeMask) {
|
| /external/llvm/lib/Target/MBlaze/Disassembler/ |
| MBlazeDisassembler.cpp | 529 uint64_t tsFlags = MBlazeInsts[opcode].TSFlags;
530 switch ((tsFlags & MBlazeII::FormMask)) {
|
