/external/llvm/lib/CodeGen/ |
LiveRangeEdit.cpp | 167 MachineInstr *DefMI = 0, *UseMI = 0; 181 if (UseMI && UseMI != MI) 186 UseMI = MI; 189 if (!DefMI || !UseMI) 193 << " into single use: " << *UseMI); 196 if (UseMI->readsWritesVirtualRegister(LI->reg, &Ops).second) 199 MachineInstr *FoldMI = TII.foldMemoryOperand(UseMI, Ops, DefMI); 203 LIS.ReplaceMachineInstrInMaps(UseMI, FoldMI); 204 UseMI->eraseFromParent() [all...] |
TwoAddressInstructionPass.cpp | 282 static bool isTwoAddrUse(MachineInstr *UseMI, unsigned Reg) { 283 const MCInstrDesc &MCID = UseMI->getDesc(); 285 MachineOperand &MO = UseMI->getOperand(i); 287 (MO.isDef() || UseMI->isRegTiedToDefOperand(i))) 306 MachineInstr *UseMI = UseMO.getParent(); 307 MachineBasicBlock *UseMBB = UseMI->getParent(); 309 DenseMap<MachineInstr*, unsigned>::iterator DI = DistanceMap.find(UseMI); 315 if (isTwoAddrUse(UseMI, Reg)) 473 MachineInstr &UseMI = *MRI->use_nodbg_begin(Reg); 474 if (UseMI.getParent() != MBB [all...] |
RegisterScavenging.cpp | 260 /// longest after StargMII. UseMI is set to the instruction where the search 268 MachineBasicBlock::iterator &UseMI) { 325 UseMI = RestorePointMI; 354 MachineBasicBlock::iterator UseMI; 355 unsigned SReg = findSurvivorReg(I, Candidates, 25, UseMI); 371 if (!TRI->saveScavengerRegister(*MBB, I, UseMI, RC, SReg)) { 380 TII->loadRegFromStackSlot(*MBB, UseMI, SReg, ScavengingFrameIndex, RC, TRI); 381 II = prior(UseMI); 385 ScavengeRestore = prior(UseMI);
|
PeepholeOptimizer.cpp | 166 MachineInstr *UseMI = &*UI; 167 if (UseMI == MI) 170 if (UseMI->isPHI()) { 192 if (UseMI->getOpcode() == TargetOpcode::SUBREG_TO_REG) 195 MachineBasicBlock *UseMBB = UseMI->getParent(); 198 if (!LocalMIs.count(UseMI)) 238 MachineInstr *UseMI = UseMO->getParent(); 239 MachineBasicBlock *UseMBB = UseMI->getParent(); 244 BuildMI(*UseMBB, UseMI, UseMI->getDebugLoc() [all...] |
DeadMachineInstructionElim.cpp | 146 MachineInstr *UseMI = Use.getParent(); 147 if (UseMI==MI) 150 UseMI->getOperand(0).setReg(0U);
|
OptimizePHIs.cpp | 145 MachineInstr *UseMI = &*I; 146 if (!UseMI->isPHI() || !IsDeadPHICycle(UseMI, PHIsInCycle))
|
RegisterCoalescer.cpp | 573 MachineInstr *UseMI = &*UI; 574 SlotIndex UseIdx = li_->getInstructionIndex(UseMI); 578 if (ULR->valno == AValNo && JoinedCopies.count(UseMI)) 616 MachineInstr *UseMI = &*UI; 618 if (JoinedCopies.count(UseMI)) 620 if (UseMI->isDebugValue()) { 626 SlotIndex UseIdx = li_->getInstructionIndex(UseMI).getUseIndex(); 634 if (UseMI == CopyMI) 636 if (!UseMI->isCopy()) 638 if (UseMI->getOperand(0).getReg() != IntB.reg | [all...] |
MachineSSAUpdater.cpp | 223 MachineInstr *UseMI = U.getParent(); 225 if (UseMI->isPHI()) { 226 MachineBasicBlock *SourceBB = findCorrespondingPred(UseMI, &U); 229 NewVR = GetValueInMiddleOfBlock(UseMI->getParent());
|
ScheduleDAGInstrs.cpp | 312 MachineInstr *UseMI = UseSU->getInstr(); 313 const MCInstrDesc &UseMCID = UseMI->getDesc(); 314 int RegUseIndex = UseMI->findRegisterUseOperandIdx(Reg); 315 assert(RegUseIndex >= 0 && "UseMI doesn's use register!"); 354 const MachineInstr *UseMI = UseMO->getParent(); 355 unsigned UseMOIdx = UseMO - &UseMI->getOperand(0); 356 const MCInstrDesc &UseMCID = UseMI->getDesc(); 364 if (UseMI->getParent() != MI->getParent()) { 612 MachineInstr *UseMI = Use->getInstr(); 615 if (UseMI) { [all...] |
MachineLICM.cpp | 769 MachineInstr *UseMI = &*UI; 770 if (UseMI->isPHI()) 773 if (UseMI->isCopy()) { 774 unsigned Def = UseMI->getOperand(0).getReg(); 793 MachineInstr *UseMI = &*I; 794 if (UseMI->isCopyLike()) 796 if (!CurLoop->contains(UseMI->getParent())) 798 for (unsigned i = 0, e = UseMI->getNumOperands(); i != e; ++i) { 799 const MachineOperand &MO = UseMI->getOperand(i); 806 if (TII->hasHighOperandLatency(InstrItins, MRI, &MI, DefIdx, UseMI, i) [all...] |
TailDuplication.cpp | 245 MachineInstr *UseMI = &*UI; 247 if (UseMI->isDebugValue()) { 252 UseMI->eraseFromParent(); 255 if (UseMI->getParent() == DefBB && !UseMI->isPHI()) 322 MachineInstr *UseMI = &*UI; 323 if (UseMI->isDebugValue()) 325 if (UseMI->getParent() != BB) [all...] |
InlineSpiller.cpp | 208 MachineInstr *UseMI = 0; 229 if (UseMI && MI != UseMI) 231 UseMI = MI; [all...] |
RegAllocFast.cpp | 553 const MachineInstr &UseMI = *MRI->use_nodbg_begin(VirtReg); 555 if (UseMI.isCopyLike()) 556 Hint = UseMI.getOperand(0).getReg(); [all...] |
LiveIntervalAnalysis.cpp | 752 MachineInstr *UseMI = I.skipInstruction();) { 753 if (UseMI->isDebugValue() || !UseMI->readsVirtualRegister(li->reg)) 755 SlotIndex Idx = getInstructionIndex(UseMI).getUseIndex(); 761 DEBUG(dbgs() << Idx << '\t' << *UseMI [all...] |
/external/llvm/lib/Target/ARM/ |
Thumb2InstrInfo.h | 60 void scheduleTwoAddrSource(MachineInstr *SrcMI, MachineInstr *UseMI,
|
MLxExpansionPass.cpp | 121 MachineInstr *UseMI = &*MRI->use_nodbg_begin(Reg); 122 if (UseMI->getParent() != MBB) 125 while (UseMI->isCopy() || UseMI->isInsertSubreg()) { 126 Reg = UseMI->getOperand(0).getReg(); 130 UseMI = &*MRI->use_nodbg_begin(Reg); 131 if (UseMI->getParent() != MBB)
|
Thumb1RegisterInfo.h | 61 MachineBasicBlock::iterator &UseMI,
|
ARMBaseInstrInfo.cpp | [all...] |
ARMBaseInstrInfo.h | 335 virtual bool FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI, 344 const MachineInstr *UseMI, unsigned UseIdx) const; 381 const MachineInstr *UseMI, unsigned UseIdx) const;
|
Thumb2InstrInfo.cpp | 566 MachineInstr *UseMI, 572 ARMCC::CondCodes CC = llvm::getInstrPredicate(UseMI, PredReg); 577 // and UseMI which can form an IT block. 580 MachineBasicBlock *MBB = UseMI->getParent();
|
Thumb1RegisterInfo.cpp | 557 MachineBasicBlock::iterator &UseMI, 570 // The UseMI is where we would like to restore the register. If there's 572 // before that instead and adjust the UseMI. 574 for (MachineBasicBlock::iterator II = I; !done && II != UseMI ; ++II) { 584 UseMI = II; 591 AddDefaultPred(BuildMI(MBB, UseMI, DL, TII.get(ARM::tMOVr)).
|
/external/llvm/lib/Target/ |
TargetInstrInfo.cpp | 67 const MachineInstr *UseMI, unsigned UseIdx) const { 72 unsigned UseClass = UseMI->getDesc().getSchedClass();
|
/external/llvm/include/llvm/CodeGen/ |
RegisterScavenging.h | 155 /// longest after StartMI. UseMI is set to the instruction where the search 162 MachineBasicBlock::iterator &UseMI);
|
/external/llvm/include/llvm/Target/ |
TargetInstrInfo.h | 190 MachineInstr *UseMI, 610 virtual bool FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI, 635 const MachineInstr *UseMI, unsigned UseIdx) const; 664 const MachineInstr *UseMI, unsigned UseIdx) const { [all...] |
TargetRegisterInfo.h | 683 MachineBasicBlock::iterator &UseMI,
|