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  /external/llvm/lib/Target/X86/
Makefile 15 BUILT_SOURCES = X86GenRegisterInfo.inc X86GenInstrInfo.inc \
16 X86GenAsmWriter.inc X86GenAsmMatcher.inc \
17 X86GenAsmWriter1.inc X86GenDAGISel.inc \
18 X86GenDisassemblerTables.inc X86GenFastISel.inc \
19 X86GenCallingConv.inc X86GenSubtargetInfo.inc \
    [all...]
  /external/llvm/lib/Target/PowerPC/
Makefile 15 BUILT_SOURCES = PPCGenRegisterInfo.inc \
16 PPCGenAsmWriter.inc PPCGenCodeEmitter.inc \
17 PPCGenInstrInfo.inc PPCGenDAGISel.inc \
18 PPCGenSubtargetInfo.inc PPCGenCallingConv.inc \
19 PPCGenMCCodeEmitter.inc
  /external/llvm/lib/Target/MBlaze/
Makefile 14 BUILT_SOURCES = MBlazeGenRegisterInfo.inc MBlazeGenInstrInfo.inc \
15 MBlazeGenAsmWriter.inc \
16 MBlazeGenDAGISel.inc MBlazeGenAsmMatcher.inc \
17 MBlazeGenCodeEmitter.inc MBlazeGenCallingConv.inc \
18 MBlazeGenSubtargetInfo.inc MBlazeGenIntrinsics.inc \
19 MBlazeGenEDInfo.inc
    [all...]
  /external/llvm/lib/Target/ARM/
Makefile 15 BUILT_SOURCES = ARMGenRegisterInfo.inc ARMGenInstrInfo.inc \
16 ARMGenAsmWriter.inc ARMGenAsmMatcher.inc \
17 ARMGenDAGISel.inc ARMGenSubtargetInfo.inc \
18 ARMGenCodeEmitter.inc ARMGenCallingConv.inc \
19 ARMGenDecoderTables.inc ARMGenEDInfo.inc \
    [all...]
  /external/llvm/lib/Target/Blackfin/
Makefile 15 BUILT_SOURCES = BlackfinGenRegisterInfo.inc BlackfinGenInstrInfo.inc \
16 BlackfinGenAsmWriter.inc \
17 BlackfinGenDAGISel.inc BlackfinGenSubtargetInfo.inc \
18 BlackfinGenCallingConv.inc BlackfinGenIntrinsics.inc
  /external/llvm/lib/Target/CellSPU/
Makefile 13 BUILT_SOURCES = SPUGenInstrInfo.inc SPUGenRegisterInfo.inc \
14 SPUGenAsmWriter.inc SPUGenCodeEmitter.inc \
15 SPUGenDAGISel.inc \
16 SPUGenSubtargetInfo.inc SPUGenCallingConv.inc
  /frameworks/base/media/libstagefright/codecs/aacdec/
shellsort.cpp 106 Int32 inc = 1; local
110 inc = 3 * inc + 1;
112 while (inc <= n);
116 inc = inc / 3;
117 for (i = inc + 1; i <= n; i++)
121 while (in[j-inc-1] > v)
123 in[j-1] = in[j-inc-1];
124 j -= inc;
    [all...]
  /external/llvm/lib/Target/Alpha/
Makefile 15 BUILT_SOURCES = AlphaGenRegisterInfo.inc AlphaGenInstrInfo.inc \
16 AlphaGenAsmWriter.inc AlphaGenDAGISel.inc \
17 AlphaGenCallingConv.inc AlphaGenSubtargetInfo.inc
  /external/llvm/lib/Target/MSP430/
Makefile 15 BUILT_SOURCES = MSP430GenRegisterInfo.inc MSP430GenInstrInfo.inc \
16 MSP430GenAsmWriter.inc \
17 MSP430GenDAGISel.inc MSP430GenCallingConv.inc \
18 MSP430GenSubtargetInfo.inc
  /external/llvm/lib/Target/Mips/
Makefile 15 BUILT_SOURCES = MipsGenRegisterInfo.inc MipsGenInstrInfo.inc \
16 MipsGenAsmWriter.inc \
17 MipsGenDAGISel.inc MipsGenCallingConv.inc \
18 MipsGenSubtargetInfo.inc
  /external/llvm/lib/Target/PTX/
Makefile 15 BUILT_SOURCES = PTXGenAsmWriter.inc \
16 PTXGenCallingConv.inc \
17 PTXGenDAGISel.inc \
18 PTXGenInstrInfo.inc \
19 PTXGenRegisterInfo.inc \
20 PTXGenSubtargetInfo.inc
  /external/llvm/lib/Target/Sparc/
Makefile 15 BUILT_SOURCES = SparcGenRegisterInfo.inc SparcGenInstrInfo.inc \
16 SparcGenAsmWriter.inc SparcGenDAGISel.inc \
17 SparcGenSubtargetInfo.inc SparcGenCallingConv.inc
  /external/llvm/lib/Target/SystemZ/
Makefile 15 BUILT_SOURCES = SystemZGenRegisterInfo.inc SystemZGenInstrInfo.inc \
16 SystemZGenAsmWriter.inc SystemZGenDAGISel.inc \
17 SystemZGenSubtargetInfo.inc SystemZGenCallingConv.inc
  /external/llvm/lib/Target/XCore/
Makefile 15 BUILT_SOURCES = XCoreGenRegisterInfo.inc XCoreGenInstrInfo.inc \
16 XCoreGenAsmWriter.inc \
17 XCoreGenDAGISel.inc XCoreGenCallingConv.inc \
18 XCoreGenSubtargetInfo.inc
  /frameworks/compile/slang/
RSSpec.mk 19 define generate-rs-spec-inc
29 ifneq ($(findstring RSClangBuiltinEnums.inc,$(RS_SPEC_TABLES)),)
30 LOCAL_GENERATED_SOURCES += $(intermediates)/RSClangBuiltinEnums.inc
31 $(intermediates)/RSClangBuiltinEnums.inc: $(RS_SPEC_GEN)
32 $(call generate-rs-spec-inc,clang-builtin-enums)
35 ifneq ($(findstring RSDataTypeEnums.inc,$(RS_SPEC_TABLES)),)
36 LOCAL_GENERATED_SOURCES += $(intermediates)/RSDataTypeEnums.inc
37 $(intermediates)/RSDataTypeEnums.inc: $(RS_SPEC_GEN)
38 $(call generate-rs-spec-inc,rs-data-type-enums)
41 ifneq ($(findstring RSMatrixTypeEnums.inc,$(RS_SPEC_TABLES)),
    [all...]
  /external/clang/lib/Basic/
Android.mk 9 DiagnosticGroups.inc \
10 DiagnosticASTKinds.inc \
11 DiagnosticLexKinds.inc \
12 DiagnosticSemaKinds.inc \
13 DiagnosticCommonKinds.inc \
14 DiagnosticDriverKinds.inc \
15 DiagnosticParseKinds.inc \
16 DiagnosticAnalysisKinds.inc \
17 DiagnosticFrontendKinds.inc \
18 DiagnosticIndexName.inc \
    [all...]
  /external/clang/lib/Serialization/
Android.mk 13 AttrList.inc \
14 AttrPCHRead.inc \
15 AttrPCHWrite.inc \
16 DiagnosticCommonKinds.inc \
17 DiagnosticFrontendKinds.inc \
18 Attrs.inc \
19 DeclNodes.inc \
20 StmtNodes.inc
  /external/llvm/lib/Support/
CMakeLists.txt 79 Unix/Host.inc
80 Unix/Memory.inc
81 Unix/Mutex.inc
82 Unix/Path.inc
83 Unix/PathV2.inc
84 Unix/Process.inc
85 Unix/Program.inc
86 Unix/RWMutex.inc
87 Unix/Signals.inc
88 Unix/system_error.inc
    [all...]
  /external/llvm/lib/Target/ARM/AsmParser/
Android.mk 9 ARMGenInstrInfo.inc \
10 ARMGenRegisterInfo.inc \
11 ARMGenAsmMatcher.inc \
12 ARMGenSubtargetInfo.inc
  /external/llvm/lib/Target/X86/AsmParser/
Android.mk 9 X86GenAsmMatcher.inc \
10 X86GenInstrInfo.inc \
11 X86GenRegisterInfo.inc \
12 X86GenSubtargetInfo.inc
  /external/clang/lib/Frontend/
Android.mk 9 AttrList.inc \
10 Attrs.inc \
11 CC1Options.inc \
12 DiagnosticASTKinds.inc \
13 DiagnosticCommonKinds.inc \
14 DiagnosticDriverKinds.inc \
15 DiagnosticFrontendKinds.inc \
16 DiagnosticLexKinds.inc \
17 DiagnosticSemaKinds.inc \
18 DeclNodes.inc \
    [all...]
  /external/llvm/tools/llvmc/examples/Simple/
Makefile 13 BUILT_SOURCES = Simple.inc
  /external/llvm/tools/llvmc/examples/mcc16/
Makefile 13 BUILT_SOURCES = PIC16.inc
  /external/llvm/tools/llvmc/src/
Makefile 12 BUILT_SOURCES = AutoGenerated.inc
  /external/clang/lib/Analysis/
Android.mk 9 AttrList.inc \
10 Attrs.inc \
11 DeclNodes.inc \
12 DiagnosticCommonKinds.inc \
13 DiagnosticAnalysisKinds.inc \
14 StmtNodes.inc

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