| /external/llvm/test/MC/MBlaze/ |
| mblaze_memory.s | 44 # CHECK: lwr
47 lwr r1, r2, r3
|
| /external/v8/src/mips/ |
| disasm-mips.cc | 860 case LWR:
861 Format(instr, "lwr 'rt, 'imm16s('rs)");
|
| assembler-mips.h | 629 void lwr(Register rd, const MemOperand& rs);
[all...] |
| assembler-mips.cc | 1376 void Assembler::lwr(Register rd, const MemOperand& rs) { function in class:v8::internal::Assembler
[all...] |
| /external/webkit/Source/JavaScriptCore/assembler/ |
| MacroAssemblerMIPS.h | 539 lwr dest, address.offset+3(addrTemp)
542 lwr dest, address.offset(addrTemp)
548 m_assembler.lwr(dest, addrTempRegister, address.offset + 3);
551 m_assembler.lwr(dest, addrTempRegister, address.offset);
576 m_assembler.lwr(dest, addrTempRegister, 3);
579 m_assembler.lwr(dest, addrTempRegister, 0);
[all...] |
| MIPSAssembler.h | 434 void lwr(RegisterID rt, RegisterID rs, int offset) function in class:JSC::MIPSAssembler
|
| /external/v8/test/cctest/ |
| test-assembler-mips.cc | 832 // Test LWL, LWR, SWL and SWR instructions.
877 // Test all combinations of LWR and vAddr.
879 __ lwr(t0, MemOperand(a0, OFFSET_OF(T, mem_init)) );
883 __ lwr(t1, MemOperand(a0, OFFSET_OF(T, mem_init) + 1) );
887 __ lwr(t2, MemOperand(a0, OFFSET_OF(T, mem_init) + 2) );
891 __ lwr(t3, MemOperand(a0, OFFSET_OF(T, mem_init) + 3) );
[all...] |
| /external/sqlite/dist/ |
| sqlite3.c | [all...] |
| sqlite3.c.orig | [all...] |
