HomeSort by relevance Sort by last modified time
    Searched refs:operands (Results 1 - 25 of 88) sorted by null

1 2 3 4

  /external/srec/srec/Semproc/src/
ExpressionEvaluator.c 39 ESR_ReturnCode EE_concat(LCHAR* name, LCHAR** operands, size_t opCount, void* data, LCHAR* resultBuf, size_t* resultLen)
44 if (operands == NULL || resultBuf == NULL || resultLen == NULL)
52 opLen = LSTRLEN(operands[i]);
54 LSTRCAT(resultBuf, operands[i]);
62 ESR_ReturnCode EE_conditional(LCHAR* name, LCHAR** operands, size_t opCount, void* data, LCHAR* resultBuf, size_t* resultLen)
64 if (operands == NULL || resultBuf == NULL || resultLen == NULL)
70 if (!LSTRCMP(operands[0], UNDEFINED_SYMBOL) || !operands[0] ||
71 !LSTRCMP(operands[0], FALSE_SYMBOL))
73 if (strlen(operands[2]) >= *resultLen
    [all...]
  /external/mesa3d/src/glsl/
ir_div_to_mul_rcp.cpp 65 if (ir->operands[1]->type->base_type != GLSL_TYPE_INT &&
66 ir->operands[1]->type->base_type != GLSL_TYPE_UINT) {
70 ir->operands[1]->type,
71 ir->operands[1],
76 ir->operands[1] = expr;
86 ir->operands[1]->type->vector_elements,
87 ir->operands[1]->type->matrix_columns);
89 if (ir->operands[1]->type->base_type == GLSL_TYPE_INT)
90 op1 = new(ir) ir_expression(ir_unop_i2f, vec_type, ir->operands[1], NULL);
92 op1 = new(ir) ir_expression(ir_unop_u2f, vec_type, ir->operands[1], NULL)
    [all...]
lower_instructions.cpp 122 ir->operands[1] = new(ir) ir_expression(ir_unop_neg, ir->operands[1]->type,
123 ir->operands[1], NULL);
130 if (!ir->operands[1]->type->is_integer()) {
134 ir->operands[1]->type,
135 ir->operands[1],
140 ir->operands[1] = expr;
150 ir->operands[1]->type->vector_elements,
151 ir->operands[1]->type->matrix_columns);
153 if (ir->operands[1]->type->base_type == GLSL_TYPE_INT
    [all...]
opt_algebraic.cpp 86 if (ir->operands[0]->type->is_vector())
87 ir->type = ir->operands[0]->type;
89 ir->type = ir->operands[1]->type;
98 ir_rvalue *temp = ir2->operands[op2];
99 ir2->operands[op2] = ir1->operands[op1];
100 ir1->operands[op1] = temp;
103 * base types matched, and at least one of the operands of the 2
125 if (ir1->operands[0]->type->is_matrix() ||
126 ir1->operands[1]->type->is_matrix() |
    [all...]
ir_validate.cpp 211 assert(ir->operands[0]->type == ir->type);
215 assert(ir->operands[0]->type->base_type == GLSL_TYPE_BOOL);
224 assert(ir->type == ir->operands[0]->type);
231 assert(ir->operands[0]->type->base_type == GLSL_TYPE_FLOAT);
232 assert(ir->type == ir->operands[0]->type);
236 assert(ir->operands[0]->type->base_type == GLSL_TYPE_FLOAT);
240 assert(ir->operands[0]->type->base_type == GLSL_TYPE_INT);
244 assert(ir->operands[0]->type->base_type == GLSL_TYPE_FLOAT);
248 assert(ir->operands[0]->type->base_type == GLSL_TYPE_BOOL);
252 assert(ir->operands[0]->type->base_type == GLSL_TYPE_INT)
    [all...]
ir_mod_to_fract.cpp 63 ir_variable *temp = new(ir) ir_variable(ir->operands[1]->type, "mod_b",
71 ir->operands[1], NULL);
75 ir->operands[0]->type,
76 ir->operands[0],
80 ir->operands[0]->type,
85 ir->operands[0] = new(ir) ir_dereference_variable(temp);
86 ir->operands[1] = expr;
lower_vector.cpp 67 ir_rvalue *op = ir->operands[i];
98 op = ex->operands[0];
162 const ir_constant *const c = expr->operands[i]->as_constant();
198 if (expr->operands[i]->ir_type == ir_type_constant)
203 new(mem_ctx) ir_assignment(lhs, expr->operands[i], NULL, (1U << i));
ir_to_llvm.cpp 504 ops[i] = llvm_value(ir->operands[i]);
510 if(ir->operands[0]->type->vector_elements <= 1 && ir->operands[1]->type->vector_elements > 1)
515 else if(ir->operands[0]->type->vector_elements > 1 && ir->operands[1]->type->vector_elements <= 1)
521 assert(ir->operands[0]->type->vector_elements == ir->operands[1]->type->vector_elements);
527 for(unsigned i = 0; i < ir->operands[vecidx]->type->vector_elements; ++i)
537 switch (ir->operands[0]->type->base_type) {
548 switch (ir->operands[0]->type->base_type)
    [all...]
ir.cpp 201 this->operands[0] = op0;
202 this->operands[1] = NULL;
203 this->operands[2] = NULL;
204 this->operands[3] = NULL;
215 this->operands[0] = op0;
216 this->operands[1] = op1;
217 this->operands[2] = NULL;
218 this->operands[3] = NULL;
228 this->operands[0] = op0;
229 this->operands[1] = op1
    [all...]
lower_vec_index_to_swizzle.cpp 89 ir->operands[i] = convert_vec_index_to_swizzle(ir->operands[i]);
loop_controls.cpp 216 ir_rvalue *counter = cond->operands[0]->as_dereference_variable();
217 ir_constant *limit = cond->operands[1]->as_constant();
221 counter = cond->operands[1]->as_dereference_variable();
222 limit = cond->operands[0]->as_constant();
ir_rvalue_visitor.cpp 44 handle_rvalue(&ir->operands[operand]);
  /external/llvm/utils/TableGen/
X86DisassemblerShared.h 27 memset(operands, 0, sizeof(operands)); \
  /external/srec/srec/Semproc/include/
SR_ExpressionEvaluator.h 60 * @param operands array of strings holding operands to concatenate
61 * @param opCount number of operands
66 SREC_SEMPROC_API ESR_ReturnCode EE_concat(LCHAR* name, LCHAR** operands, size_t opCount, void* data, LCHAR* resultBuf, size_t* resultLen);
69 * Built-in function to support conditional expressions (with 3 operands only!!!)
71 * @param operands first op is the condition, second is the true val, third is the false val
72 * @param opCount number of operands
76 SREC_SEMPROC_API ESR_ReturnCode EE_conditional(LCHAR* name, LCHAR** operands, size_t opCount, void* data, LCHAR* resultBuf, size_t* resultLen);
81 * @param operands strings to interpret as integers and then add together
82 * @param opCount number of operands
    [all...]
  /dalvik/dx/src/com/android/dx/ssa/
PhiInsn.java 41 * {@code non-null;} operands of the instruction; built up by
44 private final ArrayList<Operand> operands = new ArrayList<Operand>(); field in class:PhiInsn
50 * Constructs a new phi insn with no operands.
82 * Updates the TypeBearers of all the sources (phi operands) to be
86 * Note that local association of operands are preserved in this step.
91 for (Operand o : operands) {
130 operands.add(new Operand(registerSpec, predBlock.getIndex(),
144 for (Operand o : operands) {
150 operands.removeAll(operandsToRemove);
164 return operands.get(sourcesIndex).blockIndex
    [all...]
  /dalvik/vm/compiler/template/armv5te/
TEMPLATE_CMPL_DOUBLE.S 10 * on what value we'd like to return when one of the operands is NaN.
17 push {r0-r3} @ save operands
24 add sp, #16 @ drop unused operands
31 pop {r2-r3} @ restore operands in reverse order
32 pop {r0-r1} @ restore operands in reverse order
  /external/llvm/include/llvm/
OperandTraits.h 12 // the operands in the most efficient manner.
38 static unsigned operands(const User*) { function in struct:llvm::FixedNumOperandTraits
47 /// OptionalOperandTraits - when the number of operands may change at runtime.
52 static unsigned operands(const User *U) { function in struct:llvm::OptionalOperandTraits
73 static unsigned operands(const User *U) { function in struct:llvm::VariadicOperandTraits
100 static unsigned operands(const User *U) { function in struct:llvm::HungoffOperandTraits
137 assert(i_nocapture < OperandTraits<CLASS>::operands(this) \
143 assert(i_nocapture < OperandTraits<CLASS>::operands(this) \
148 return OperandTraits<CLASS>::operands(this); \
174 assert(i_nocapture < OperandTraits<CLASS>::operands(this)
    [all...]
  /dalvik/vm/compiler/codegen/arm/
CodegenCommon.cpp 84 if (DOUBLEREG(lir->operands[0])) {
154 setupRegMask(&lir->defMask, lir->operands[0]);
158 setupRegMask(&lir->defMask, lir->operands[1]);
170 lir->defMask |= ENCODE_REG_LIST(lir->operands[0]);
174 lir->defMask |= ENCODE_REG_LIST(lir->operands[1]);
191 setupRegMask(&lir->useMask, lir->operands[i]);
205 lir->useMask |= ENCODE_REG_LIST(lir->operands[0]);
209 lir->useMask |= ENCODE_REG_LIST(lir->operands[1]);
250 setupRegMask(&lir->useMask, lir->operands[i]);
262 * operands
    [all...]
LocalOptimizations.cpp 24 /* Check RAW, WAR, and WAR dependency on the register operands */
108 int nativeRegId = thisLIR->operands[0];
160 REGTYPE(checkLIR->operands[0]) == REGTYPE(nativeRegId)){
165 if (checkLIR->operands[0] != nativeRegId) {
167 checkLIR->operands[0],
177 REGTYPE(checkLIR->operands[0]) ==
187 if (checkLIR->operands[0] !=
191 checkLIR->operands[0],
234 * their register operands have any RAW, WAR, and WAW
ArchUtility.cpp 96 operand = lir->operands[nc-'0'];
204 int offset_1 = lir->operands[0];
205 int offset_2 = NEXT_LIR(lir)->operands[0];
301 int dest = lir->operands[0];
348 (char *) lir->operands[1]);
359 lir->operands[1]);
412 ((CallsiteInfo *) armLIR->operands[0])->classDescriptor);
419 armLIR->operands[0]);
  /external/llvm/lib/VMCore/
ConstantsContext.h 51 // allocate space for exactly two operands
71 // allocate space for exactly three operands
91 // allocate space for exactly two operands
111 // allocate space for exactly three operands
132 // allocate space for exactly three operands
226 // allocate space for exactly two operands
310 operands(ops.begin(), ops.end()), indices(inds.begin(), inds.end()) {}
314 std::vector<Constant*> operands; member in struct:llvm::ExprMapKeyType
320 this->operands == that.operands &
    [all...]
  /external/clang/test/SemaCXX/
null_in_arithmetic_ops.cpp 31 expected-error {{invalid operands to binary expression ('long' and 'void (^)()')}} \
32 expected-error {{invalid operands to binary expression ('void (^)()' and 'long')}}
34 expected-error {{invalid operands to binary expression ('long' and 'void (X::*)()')}} \
35 expected-error {{invalid operands to binary expression ('void (X::*)()' and 'long')}}
  /dalvik/vm/compiler/codegen/arm/Thumb2/
Factory.cpp 66 loadPcRel->operands[0] = rDest;
67 loadPcRel->operands[1] = r15pc;
70 loadPcRel->aliasInfo = dataTarget->operands[0];
174 loadPcRel->operands[0] = rDest;
177 loadPcRel->aliasInfo = dataTarget->operands[0];
185 if (dataTarget->operands[0] != value) {
186 opRegImm(cUnit, kOpAdd, rDest, value - dataTarget->operands[0]);
225 loadPcRel->operands[0] = rDest;
228 loadPcRel->aliasInfo = dataTarget->operands[0];
    [all...]
  /external/bluetooth/bluez/audio/
control.c 90 /* operands in passthrough commands */
358 const unsigned char *operands,
367 if (operands[0] & 0x80) {
378 if ((operands[0] & 0x7F) != key_map[i].avrcp)
403 operands[0] & 0x7F, status);
498 unsigned char buf[1024], *operands; local
538 operands = buf + sizeof(struct avctp_header) + sizeof(struct avrcp_header);
542 "opcode 0x%02X, %d operands",
558 handle_panel_passthrough(control, operands, operand_count);
572 operands[0] = 0x07
999 uint8_t *operands = &buf[AVCTP_HEADER_LENGTH + AVRCP_HEADER_LENGTH]; local
    [all...]
  /dalvik/vm/compiler/codegen/x86/
X86LIR.h 160 int operands[4]; // [0..3] = [dest, src1, src2, extra] member in struct:X86LIR

Completed in 4223 milliseconds

1 2 3 4