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    Searched refs:rlSrc1 (Results 1 - 7 of 7) sorted by null

  /dalvik/vm/compiler/codegen/arm/FP/
ThumbPortableFP.cpp 19 RegLocation rlDest, RegLocation rlSrc1,
23 RegLocation rlDest, RegLocation rlSrc1,
36 RegLocation rlDest, RegLocation rlSrc1,
39 return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1, rlSrc2);
43 RegLocation rlDest, RegLocation rlSrc1,
46 return genArithOpDoublePortable(cUnit, mir, rlDest, rlSrc1, rlSrc2);
55 RegLocation rlSrc1, RegLocation rlSrc2)
64 loadValueDirectFixed(cUnit, rlSrc1, r0);
70 loadValueDirectFixed(cUnit, rlSrc1, r0);
76 loadValueDirectWideFixed(cUnit, rlSrc1, r0, r1)
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Thumb2VFP.cpp 18 RegLocation rlDest, RegLocation rlSrc1,
48 return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1,
54 rlSrc1 = loadValue(cUnit, rlSrc1, kFPReg);
57 newLIR3(cUnit, (ArmOpcode)op, rlResult.lowReg, rlSrc1.lowReg,
64 RegLocation rlDest, RegLocation rlSrc1,
90 return genArithOpDoublePortable(cUnit, mir, rlDest, rlSrc1,
97 rlSrc1 = loadValueWide(cUnit, rlSrc1, kFPReg);
98 assert(rlSrc1.wide)
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ThumbVFP.cpp 65 RegLocation rlDest, RegLocation rlSrc1,
94 return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1, rlSrc2);
100 loadValueAddressDirect(cUnit, rlSrc1, r1);
111 RegLocation rlDest, RegLocation rlSrc1,
136 return genArithOpDoublePortable(cUnit, mir, rlDest, rlSrc1,
143 loadValueAddressDirect(cUnit, rlSrc1, r1);
227 RegLocation rlSrc1, RegLocation rlSrc2)
251 loadValueAddressDirect(cUnit, rlSrc1, r0);
  /dalvik/vm/compiler/codegen/arm/
Codegen.h 39 RegLocation rlDest, RegLocation rlSrc1,
43 RegLocation rlDest, RegLocation rlSrc1,
CodegenDriver.cpp 82 RegLocation rlDest, RegLocation rlSrc1,
110 genNegFloat(cUnit, rlDest, rlSrc1);
117 loadValueDirectFixed(cUnit, rlSrc1, r0);
128 RegLocation rlDest, RegLocation rlSrc1,
156 genNegDouble(cUnit, rlDest, rlSrc1);
164 loadValueDirectWideFixed(cUnit, rlSrc1, r0, r1);
633 RegLocation rlDest, RegLocation rlSrc1,
642 loadValueDirectWideFixed(cUnit, rlSrc1, r0, r1);
666 RegLocation rlDest, RegLocation rlSrc1,
697 genMulLong(cUnit, rlDest, rlSrc1, rlSrc2)
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  /dalvik/vm/compiler/codegen/arm/Thumb/
Gen.cpp 109 RegLocation rlSrc1, RegLocation rlSrc2)
112 loadValueDirectWideFixed(cUnit, rlSrc1, r0, r1);
126 RegLocation rlSrc1, RegLocation rlSrc2)
129 if (partialOverlap(rlSrc1.sRegLow,rlSrc2.sRegLow) ||
130 partialOverlap(rlSrc1.sRegLow,rlDest.sRegLow) ||
134 } else if (rlDest.sRegLow == rlSrc1.sRegLow) {
143 rlSrc1 = loadValueWide(cUnit, rlSrc1, kCoreReg);
145 opRegReg(cUnit, firstOp, rlSrc1.lowReg, rlResult.lowReg);
146 opRegReg(cUnit, secondOp, rlSrc1.highReg, rlResult.highReg)
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  /dalvik/vm/compiler/codegen/arm/Thumb2/
Gen.cpp 103 RegLocation rlSrc1, RegLocation rlSrc2)
110 rlSrc1 = loadValueWide(cUnit, rlSrc1, kCoreReg);
113 newLIR3(cUnit, kThumb2MulRRR, tmp1, rlSrc2.lowReg, rlSrc1.highReg);
114 newLIR4(cUnit, kThumb2Umull, resLo, resHi, rlSrc2.lowReg, rlSrc1.lowReg);
115 newLIR4(cUnit, kThumb2Mla, tmp1, rlSrc1.lowReg, rlSrc2.highReg, tmp1);
127 RegLocation rlSrc1, RegLocation rlSrc2)
130 rlSrc1 = loadValueWide(cUnit, rlSrc1, kCoreReg);
133 opRegRegReg(cUnit, firstOp, rlResult.lowReg, rlSrc1.lowReg, rlSrc2.lowReg)
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