/external/v8/src/mips/ |
disasm-mips.cc | 623 case SRLV: 625 Format(instr, "srlv 'rd, 'rt, 'rs");
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assembler-mips.h | 614 void srlv(Register rd, Register rt, Register rs); [all...] |
macro-assembler-mips.cc | 546 srlv(rd, rs, rt.rm()); 888 srlv(scratch, scratch, dest); [all...] |
assembler-mips.cc | 1227 void Assembler::srlv(Register rd, Register rt, Register rs) { function in class:v8::internal::Assembler [all...] |
/external/webkit/Source/JavaScriptCore/assembler/ |
MIPSAssembler.h | 407 void srlv(RegisterID rd, RegisterID rt, RegisterID rs) function in class:JSC::MIPSAssembler
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MacroAssemblerMIPS.h | 330 m_assembler.srlv(dest, dest, shiftAmount); [all...] |
/external/v8/test/cctest/ |
test-assembler-mips.cc | 163 __ srlv(v0, v0, t0); // 0x0f234560 [all...] |