| /external/llvm/test/CodeGen/CellSPU/useful-harnesses/ |
| vecoperations.c | 6 typedef float v4f32 __attribute__((ext_vector_type(4))); typedef
54 void print_v4f32(const char *str, v4f32 v) {
101 v4f32 v4f32_shuffle_1(v4f32 a) {
102 v4f32 c2 = a.yzwx;
106 v4f32 v4f32_shuffle_2(v4f32 a) {
107 v4f32 c2 = a.zwxy;
111 v4f32 v4f32_shuffle_3(v4f32 a)
[all...] |
| /external/clang/test/CodeGen/ |
| x86_64-arguments.c | 154 typedef float v4f32 __attribute__((__vector_size__(16))); typedef
155 v4f32 f25(v4f32 X) {
178 v4f32 v;
|
| /external/llvm/include/llvm/CodeGen/ |
| ValueTypes.h | 72 v4f32 = 29, // 4 x f32 enumerator in enum:llvm::MVT::SimpleValueType
207 case v4f32:
230 case v4f32:
276 case v4f32:
364 if (NumElements == 4) return MVT::v4f32;
482 V==MVT::v2i64 || V==MVT::v4f32 || V==MVT::v2f64);
|
| /external/llvm/lib/VMCore/ |
| ValueTypes.cpp | 131 case MVT::v4f32: return "v4f32";
178 case MVT::v4f32: return VectorType::get(Type::getFloatTy(Context), 4);
|
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 441 addQRTypeForNEON(MVT::v4f32);
[all...] |
| ARMISelDAGToDAG.cpp | [all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | 397 addRegisterClass(MVT::v4f32, SPU::VECREGRegisterClass);
436 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4f32, Custom);
438 setOperationAction(ISD::FDIV, MVT::v4f32, Legal);
[all...] |
| SPUISelDAGToDAG.cpp | 601 case MVT::v4f32:
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 349 addRegisterClass(MVT::v4f32, PPC::VRRCRegisterClass);
354 setOperationAction(ISD::MUL, MVT::v4f32, Legal);
359 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4f32, Custom);
365 setOperationAction(ISD::BUILD_VECTOR, MVT::v4f32, Custom);
[all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenTarget.cpp | 86 case MVT::v4f32: return "MVT::v4f32";
|
