| /bootable/bootloader/legacy/arch_msm7k/ |
| vic.c | 49 writel(0, VIC_INT_TYPE0);
50 writel(0, VIC_INT_TYPE1);
53 writel(0, VIC_INT_SELECT0);
54 writel(0, VIC_INT_SELECT1);
57 writel(0xffffffff, VIC_INT_CLEAR0);
58 writel(0xffffffff, VIC_INT_CLEAR1);
61 writel(0, VIC_INT_EN0);
62 writel(0, VIC_INT_EN1);
65 writel(0, VIC_CONFIG);
67 writel(1, VIC_INT_MASTEREN)
[all...] |
| mddi.c | 102 writel((unsigned) ll, MDDI_PRI_PTR);
112 writel((unsigned) mlist, MDDI_PRI_PTR);
122 writel(cmd, MDDI_CMD);
136 // writel(CMD_HIBERNATE, MDDI_CMD);
137 // writel(CMD_LINK_ACTIVE, MDDI_CMD);
139 writel(256, MDDI_REV_SIZE);
140 writel((unsigned) rev_pkt_buf, MDDI_REV_PTR);
177 writel(0x0001, MDDI_VERSION);
178 writel(0x3C00, MDDI_BPS);
179 writel(0x0003, MDDI_SPM)
[all...] |
| clock.c | 82 writel(0, GPT_CLEAR);
83 writel(0, GPT_ENABLE);
86 writel(GPT_ENABLE_EN, GPT_ENABLE);
91 writel(0, GPT_ENABLE);
92 writel(0, GPT_CLEAR);
103 writel(0, GPT_CLEAR);
104 writel(0, GPT_ENABLE);
107 writel(GPT_ENABLE_EN, GPT_ENABLE);
110 writel(0, GPT_ENABLE);
111 writel(0, GPT_CLEAR);
[all...] |
| hsusb.c | 109 writel(n, USB_ENDPTCTRL(ept->num));
138 writel(ept->bit, USB_ENDPTPRIME);
227 writel(ept->bit, USB_ENDPTSETUPSTAT);
274 writel(0, USB_ENDPTCTRL(1));
285 writel((s.value << 25) | (1 << 24), USB_DEVICEADDR);
316 writel((1<<16) | (1 << 0), USB_ENDPTCTRL(ept->num));
322 writel(ULPI_RUN | ULPI_READ | ULPI_ADDR(reg),
334 writel(ULPI_RUN | ULPI_WRITE |
354 writel(0x81000000, USB_PORTSC);
357 writel(0x00080002, USB_USBCMD)
[all...] |
| gpio.c | 134 writel(v | b, r->oe);
136 writel(v & (~b), r->oe);
150 writel(v | b, r->out);
152 writel(v & (~b), r->out);
|
| shared.c | 56 writel(1, MSM_A2M_INT(6));
128 writel(cmd, APP_COMMAND);
130 writel(*data1, APP_DATA1);
132 writel(*data2, APP_DATA2);
|
| uart.c | 35 #define uwr(v,a) writel(v, uart_base + (a))
|
| nand.c | 73 writel(DMOV_CMD_PTR_LIST | DMOV_CMD_ADDR(paddr(ptr)), ch.cmd);
|
| /external/grub/netboot/ |
| w89c840.c | 160 #undef writel macro
166 #define writel outl macro
323 writel(0x00000001, ioaddr + PCIBusCfg);
327 writel(virt_to_bus(w840private.rx_ring), ioaddr + RxRingPtr);
328 writel(virt_to_bus(w840private.tx_ring), ioaddr + TxRingPtr);
345 writel(0xE010, ioaddr + PCIBusCfg);
347 writel(0, ioaddr + RxStartDemand);
353 writel(0x1A0F5, ioaddr + IntrStatus);
354 writel(0x1A0F5, ioaddr + IntrEnable);
368 writel(intr_stat & 0x001ffff, ioaddr + IntrStatus)
[all...] |
| fa311.c | 169 writel(virt_to_bus(dev->rx_ring), dev->ioaddr + RxRingPtr);
170 writel(virt_to_bus(dev->tx_ring), dev->ioaddr + TxRingPtr);
174 writel(i, dev->ioaddr + RxFilterAddr);
191 writel(tx_config, dev->ioaddr + TxConfig);
192 writel(rx_config, dev->ioaddr + RxConfig);
205 writel(AcceptBroadcast | AcceptAllMulticast | AcceptMyPhys,
208 writel(RxOn | TxOn, dev->ioaddr + ChipCmd);
209 writel(4, dev->ioaddr + StatsCtrl); /* Clear Stats */
265 writel(RxOn, dev->ioaddr + ChipCmd);
303 writel(TxOn, dev->ioaddr + ChipCmd)
[all...] |
| depca.c | 483 writel((p = lp.dma_buffs + i * RX_BUFF_SZ) | R_OWN, &lp.rx_ring[i].base);
488 writel((p = lp.dma_buffs + (i + lp.txRingMask + 1) * TX_BUFF_SZ) & 0x00ffffff, &lp.tx_ring[i].base);
630 writel(readl(&lp.tx_ring[entry].base) & ~T_FLAGS, &lp.tx_ring[entry].base);
636 writel(readl(&lp.tx_ring[entry].base) | (T_STP|T_ENP|T_OWN), &lp.tx_ring[entry].base);
|
| linux-asm-io.h | 52 #define writel(b,addr) ((*(volatile unsigned int *) (addr)) = (b)) macro
|
| /bootable/bootloader/legacy/include/boot/ |
| boot.h | 39 static inline void writel(unsigned val, unsigned addr) function
|
| /external/kernel-headers/original/asm-x86/ |
| io_32.h | 112 * writew/writel functions and the other mmio helpers. The returned
192 static inline void writel(unsigned int b, volatile void __iomem *addr) function
198 #define __raw_writel writel
|
| /external/kernel-headers/original/asm-arm/ |
| io.h | 182 #define writel(v,c) __raw_writel((__force __u32) \ macro
220 #define writel(v,c) __readwrite_bug("writel") macro
|
| /external/qemu-pc-bios/bochs/bios/ |
| rombios32.c | 122 static inline void writel(void *addr, uint32_t val) function
651 writel(APIC_BASE + APIC_SVR, val);
658 writel(APIC_BASE + APIC_ICR_LOW, 0x000C4500);
660 writel(APIC_BASE + APIC_ICR_LOW, 0x000C4600 | sipi_vector);
[all...] |
