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/external/llvm/test/CodeGen/ARM/
2009-08-21-PostRAKill2.ll
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declare double @floor(double) nounwind
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%0 = tail call double @floor(double %b) nounwind
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; <double> [#uses=0]
vshiftins.ll
147
declare <8 x i8> @llvm.arm.neon.vshiftins.v8i8(<8 x i8>, <8 x i8>, <8 x i8>) nounwind
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declare <4 x i16> @llvm.arm.neon.vshiftins.v4i16(<4 x i16>, <4 x i16>, <4 x i16>) nounwind
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declare <2 x i32> @llvm.arm.neon.vshiftins.v2i32(<2 x i32>, <2 x i32>, <2 x i32>) nounwind
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declare <1 x i64> @llvm.arm.neon.vshiftins.v1i64(<1 x i64>, <1 x i64>, <1 x i64>) nounwind
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152
declare <16 x i8> @llvm.arm.neon.vshiftins.v16i8(<16 x i8>, <16 x i8>, <16 x i8>) nounwind
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153
declare <8 x i16> @llvm.arm.neon.vshiftins.v8i16(<8 x i16>, <8 x i16>, <8 x i16>) nounwind
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declare <4 x i32> @llvm.arm.neon.vshiftins.v4i32(<4 x i32>, <4 x i32>, <4 x i32>) nounwind
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declare <2 x i64> @llvm.arm.neon.vshiftins.v2i64(<2 x i64>, <2 x i64>, <2 x i64>) nounwind
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vshl.ll
344
declare <8 x i8> @llvm.arm.neon.vshifts.v8i8(<8 x i8>, <8 x i8>) nounwind
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declare <4 x i16> @llvm.arm.neon.vshifts.v4i16(<4 x i16>, <4 x i16>) nounwind
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declare <2 x i32> @llvm.arm.neon.vshifts.v2i32(<2 x i32>, <2 x i32>) nounwind
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declare <1 x i64> @llvm.arm.neon.vshifts.v1i64(<1 x i64>, <1 x i64>) nounwind
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349
declare <8 x i8> @llvm.arm.neon.vshiftu.v8i8(<8 x i8>, <8 x i8>) nounwind
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declare <4 x i16> @llvm.arm.neon.vshiftu.v4i16(<4 x i16>, <4 x i16>) nounwind
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declare <2 x i32> @llvm.arm.neon.vshiftu.v2i32(<2 x i32>, <2 x i32>) nounwind
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declare <1 x i64> @llvm.arm.neon.vshiftu.v1i64(<1 x i64>, <1 x i64>) nounwind
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354
declare <16 x i8> @llvm.arm.neon.vshifts.v16i8(<16 x i8>, <16 x i8>) nounwind
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declare <8 x i16> @llvm.arm.neon.vshifts.v8i16(<8 x i16>, <8 x i16>) nounwind
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vmul.ll
93
declare <8 x i8> @llvm.arm.neon.vmulp.v8i8(<8 x i8>, <8 x i8>) nounwind
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declare <16 x i8> @llvm.arm.neon.vmulp.v16i8(<16 x i8>, <16 x i8>) nounwind
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96
define arm_aapcs_vfpcc <2 x float> @test_vmul_lanef32(<2 x float> %arg0_float32x2_t, <2 x float> %arg1_float32x2_t) nounwind
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{
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define arm_aapcs_vfpcc <4 x i16> @test_vmul_lanes16(<4 x i16> %arg0_int16x4_t, <4 x i16> %arg1_int16x4_t) nounwind
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{
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define arm_aapcs_vfpcc <2 x i32> @test_vmul_lanes32(<2 x i32> %arg0_int32x2_t, <2 x i32> %arg1_int32x2_t) nounwind
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{
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define arm_aapcs_vfpcc <4 x float> @test_vmulQ_lanef32(<4 x float> %arg0_float32x4_t, <2 x float> %arg1_float32x2_t) nounwind
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{
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define arm_aapcs_vfpcc <8 x i16> @test_vmulQ_lanes16(<8 x i16> %arg0_int16x8_t, <4 x i16> %arg1_int16x4_t) nounwind
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{
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define arm_aapcs_vfpcc <4 x i32> @test_vmulQ_lanes32(<4 x i32> %arg0_int32x4_t, <2 x i32> %arg1_int32x2_t) nounwind
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{
279
define arm_aapcs_vfpcc <4 x i32> @test_vmull_lanes16(<4 x i16> %arg0_int16x4_t, <4 x i16> %arg1_int16x4_t) nounwind
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{
290
define arm_aapcs_vfpcc <4 x i32> @test_vmull_lanes16_int(<4 x i16> %arg0_int16x4_t, <4 x i16> %arg1_int16x4_t) nounwind
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{
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2009-08-29-ExtractEltf32.ll
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declare <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float>, <2 x float>) nounwind
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2009-08-29-TooLongSplat.ll
12
%4 = tail call double @fabs(double %3) nounwind
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; <double> [#uses=1]
armv4.ll
8
define i32 @test(i32 %a) nounwind
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{
fixunsdfdi.ll
4
define hidden i64 @__fixunsdfdi(double %x) nounwind
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{
vsra.ll
323
declare <8 x i8> @llvm.arm.neon.vrshifts.v8i8(<8 x i8>, <8 x i8>) nounwind
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324
declare <4 x i16> @llvm.arm.neon.vrshifts.v4i16(<4 x i16>, <4 x i16>) nounwind
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325
declare <2 x i32> @llvm.arm.neon.vrshifts.v2i32(<2 x i32>, <2 x i32>) nounwind
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326
declare <1 x i64> @llvm.arm.neon.vrshifts.v1i64(<1 x i64>, <1 x i64>) nounwind
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328
declare <8 x i8> @llvm.arm.neon.vrshiftu.v8i8(<8 x i8>, <8 x i8>) nounwind
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329
declare <4 x i16> @llvm.arm.neon.vrshiftu.v4i16(<4 x i16>, <4 x i16>) nounwind
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330
declare <2 x i32> @llvm.arm.neon.vrshiftu.v2i32(<2 x i32>, <2 x i32>) nounwind
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331
declare <1 x i64> @llvm.arm.neon.vrshiftu.v1i64(<1 x i64>, <1 x i64>) nounwind
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333
declare <16 x i8> @llvm.arm.neon.vrshifts.v16i8(<16 x i8>, <16 x i8>) nounwind
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declare <8 x i16> @llvm.arm.neon.vrshifts.v8i16(<8 x i16>, <8 x i16>) nounwind
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/external/llvm/test/CodeGen/X86/
dbg-const-int.ll
7
define i32 @foo() nounwind uwtable
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optsize ssp {
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declare void @llvm.dbg.value(metadata, i64, metadata) nounwind
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dbg-const.ll
16
declare void @llvm.dbg.value(metadata, i64, metadata) nounwind
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17
declare i32 @bar() nounwind
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movgs.ll
44
%2 = tail call <4 x i32> @llvm.x86.sse41.pmovsxwd(<8 x i16> %1) nounwind
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declare <4 x i32> @llvm.x86.sse41.pmovsxwd(<8 x i16>) nounwind
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select.ll
40
define float @test3(i32 %x) nounwind
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{
107
define i64 @test9(i64 %x, i64 %y) nounwind
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ssp noredzone {
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define i64 @test9a(i64 %x, i64 %y) nounwind
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ssp noredzone {
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define i64 @test9b(i64 %x, i64 %y) nounwind
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ssp noredzone {
143
define i64 @test10(i64 %x, i64 %y) nounwind
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ssp noredzone {
156
define i64 @test11(i64 %x, i64 %y) nounwind
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ssp noredzone {
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define i64 @test11a(i64 %x, i64 %y) nounwind
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ssp noredzone {
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declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) nounwind
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sext-i1.ll
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define i32 @t1(i32 %x) nounwind
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ssp {
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define i32 @t2(i32 %x) nounwind
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ssp {
2009-03-07-FPConstSelect.ll
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define float @f(i32 %x) nounwind
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{
2009-05-23-dagcombine-shifts.ll
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define i64 @foo(i64 %b) nounwind
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{
2010-01-07-ISelBug.ll
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declare i32 @llvm.bswap.i32(i32) nounwind
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2010-02-23-DIV8rDefinesAX.ll
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declare fastcc signext i8 @FETCH() nounwind
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ssp
/external/llvm/test/DebugInfo/
2010-05-10-MultipleCU.ll
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define i32 @foo() nounwind
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ssp {
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define i32 @bar() nounwind
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ssp {
/external/llvm/test/CodeGen/CellSPU/
2009-01-01-BrCond.ll
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; declare i32 @llvm.ctlz.i32(i32) nounwind
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/external/llvm/test/CodeGen/MSP430/
2009-08-25-DynamicStackAlloc.ll
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define i16 @foo() nounwind
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{
/external/llvm/test/CodeGen/Mips/
2010-07-20-Select.ll
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define i32 @main() nounwind
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{
2010-07-20-Switch.ll
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define i32 @main() nounwind
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{
/external/llvm/test/CodeGen/Thumb2/
2009-08-04-CoalescerAssert.ll
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declare i8* @llvm.frameaddress(i32) nounwind
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thumb2-mul.ll
13
define %struct.CMPoint* @t1(i32 %i, i32 %j, i32 %n, %struct.CMPoint* %thePoints) nounwind
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ssp {
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