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/external/llvm/test/CodeGen/CellSPU/
i8ops.ll	1 ; RUN: llc < %s -march=cellspu > %t1.s
immed16.ll	1 ; RUN: llc < %s -march=cellspu > %t1.s
sub_ops.ll	1 ; RUN: llc < %s -march=cellspu | FileCheck %s
call_indirect.ll	1 ; RUN: llc < %s -march=cellspu -asm-verbose=0 -regalloc=linearscan > %t1.s 2 ; RUN: llc < %s -march=cellspu -mattr=large_mem -asm-verbose=0 -regalloc=linearscan > %t2.s
2010-04-07-DbgValueOtherTargets.ll	1 ; RUN: llc -O0 -march=cellspu -asm-verbose < %s | FileCheck %s
fneg-fabs.ll	1 ; RUN: llc < %s -march=cellspu > %t1.s
int2fp.ll	1 ; RUN: llc < %s -march=cellspu > %t1.s
i64ops.ll	1 ; RUN: llc < %s -march=cellspu > %t1.s
immed32.ll	1 ; RUN: llc < %s -march=cellspu > %t1.s
immed64.ll	1 ; RUN: llc < %s -march=cellspu > %t1.s
loads.ll	1 ; RUN: llc < %s -march=cellspu | FileCheck %s
sext128.ll	1 ; RUN: llc < %s -march=cellspu | FileCheck %s
v2f32.ll	1 ;RUN: llc --march=cellspu %s -o - | FileCheck %s
v2i32.ll	1 ;RUN: llc --march=cellspu %s -o - | FileCheck %s
struct_1.ll	1 ; RUN: llc < %s -march=cellspu > %t1.s 2 ; RUN: llc < %s -march=cellspu -mattr=large_mem > %t2.s
/external/llvm/lib/Target/CellSPU/
SPUFrameLowering.h	10 // This file contains CellSPU frame information that doesn't fit anywhere else 48 For CellSPU, a function's saved spill slots is just the link register.
SPUMachineFunction.h	1 //===-- SPUMachineFunctionInfo.h - Private data used for CellSPU --*- C++ -*-=//
README.txt	1 //===- README.txt - Notes for improving CellSPU-specific code gen ---------===// 28 --WARNING--: The CellSPU work is work-in-progress and "alpha" quality code. 41 for CellSPU, and insert branch prediction instructions as needed.
SPUISelLowering.h	62 //! Utility functions specific to CellSPU: 79 //! Simplify a EVT::v2i64 constant splat to CellSPU-ready form 95 This is where the CellSPU backend sets operation handling (i.e., legal,
SPUTargetMachine.h	10 // This file declares the CellSPU-specific subclass of TargetMachine.
SPUCallingConv.td	1 //===- SPUCallingConv.td - Calling Conventions for CellSPU -*- tablegen -*-===// 37 // CellSPU Argument Calling Conventions
/external/llvm/lib/Target/CellSPU/MCTargetDesc/
SPUMCAsmInfo.cpp	34 // Exception handling is not supported on CellSPU (think about it: you only
/external/llvm/
LICENSE.TXT	67 CellSPU backend llvm/lib/Target/CellSPU/README.txt
NOTICE	67 CellSPU backend llvm/lib/Target/CellSPU/README.txt
/external/llvm/lib/Analysis/
NOTICE	67 CellSPU backend llvm/lib/Target/CellSPU/README.txt

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