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  /external/qemu/hw/
i8254.c 50 /* irq handling */
53 qemu_irq irq; member in struct:PITChannelState
285 /* XXX: update irq timer ? */
372 qemu_set_irq(s->irq, irq_level);
488 PITState *pit_init(int base, qemu_irq irq)
494 /* the timer 0 is connected to an IRQ */
496 s->irq = irq;
goldfish_tty.c 209 int goldfish_tty_add(CharDriverState *cs, int id, uint32_t base, int irq)
220 s->dev.irq = irq;
pci.h 156 /* IRQ objects for the INTA-INTD pins. */
157 qemu_irq *irq; member in struct:PCIDevice
159 /* Current IRQ levels. Used internally by the generic PCI code. */
ne2000.c 142 qemu_irq irq; member in struct:NE2000State
171 printf("NE2000: Set IRQ to %d (%02x %02x)\n",
174 qemu_set_irq(s->irq, (isr != 0));
678 qemu_put_be32s(f, &tmp); /* ignored, was irq */
738 void isa_ne2000_init(int base, qemu_irq irq, NICInfo *nd)
757 s->irq = irq;
822 s->irq = d->dev.irq[0];
  /packages/apps/Browser/src/com/android/browser/
Performance.java 45 Process.PROC_SPACE_TERM | Process.PROC_OUT_LONG, // 6: irq time
110 + " ms and irq took " + (sysCpu[4] + sysCpu[5] + sysCpu[6] - mIrqStart)
  /prebuilt/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/linux/
rtc.h 83 #define RTC_IRQP_READ _IOR('p', 0x0b, unsigned long) /* Read IRQ rate */
84 #define RTC_IRQP_SET _IOW('p', 0x0c, unsigned long) /* Set IRQ rate */
scc.h 151 int irq; /* irq */ member in struct:scc_hw_config
  /bionic/libc/kernel/arch-sh/asm/
machvec.h 54 int (*mv_irq_demux)(int irq);
system.h 38 #include <asm/cmpxchg-irq.h>
  /bionic/libc/kernel/arch-x86/asm/
genapic_32.h 40 int (*multi_timer_check)(int apic, int irq);
  /development/ndk/platforms/android-9/arch-x86/include/asm/
genapic_32.h 40 int (*multi_timer_check)(int apic, int irq);
  /external/kernel-headers/original/linux/
irqflags.h 4 * IRQ flags tracing: follow the state of the hardirq and softirq flags and
rtc.h 83 #define RTC_IRQP_READ _IOR('p', 0x0b, unsigned long) /* Read IRQ rate */
84 #define RTC_IRQP_SET _IOW('p', 0x0c, unsigned long) /* Set IRQ rate */
211 irqreturn_t rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs);
spinlock_api_up.h 23 * only thing we have to do is to keep the preempt counts and irq
  /hardware/invensense/mlsdk/platform/include/linux/
mpu.h 177 * @irq: the irq number attached to the slave if any.
182 * @irq_data: private data for the slave irq handler
193 int irq; member in struct:ext_slave_platform_data
  /prebuilt/ndk/android-ndk-r4/platforms/android-5/arch-x86/usr/include/asm/
genapic_32.h 40 int (*multi_timer_check)(int apic, int irq);
  /prebuilt/ndk/android-ndk-r4/platforms/android-8/arch-x86/usr/include/asm/
genapic_32.h 40 int (*multi_timer_check)(int apic, int irq);
  /prebuilt/ndk/android-ndk-r6/platforms/android-9/arch-x86/usr/include/asm/
genapic_32.h 40 int (*multi_timer_check)(int apic, int irq);
  /external/grub/netboot/
tlan.c     [all...]
tulip.txt 26 and being PCI, they auto-configure IRQ and IOADDR and auto-negotiate
  /device/google/accessory/arduino/USB_Host_Shield/
Usb.cpp 174 regWr( rHIRQ, bmRCVDAVIRQ ); // Clear the IRQ & free the buffer
210 regWr( rHIRQ, bmRCVDAVIRQ ); // Clear the IRQ & free the buffer
252 while(!(regRd( rHIRQ ) & bmHXFRDNIRQ )); //wait for the completion IRQ
253 regWr( rHIRQ, bmHXFRDNIRQ ); //clear IRQ
277 while(!(regRd( rHIRQ ) & bmHXFRDNIRQ )); //wait for the completion IRQ
278 regWr( rHIRQ, bmHXFRDNIRQ ); //clear IRQ
  /external/qemu/android/config/linux-x86/linux/
kvm.h 47 * ACPI gsi notion of irq.
48 * For IA-64 (APIC model) IOAPIC0: irq 0-23; IOAPIC1: irq 24-47..
49 * For X86 (standard AT mode) PIC0/1: irq 0-15. IOAPIC0: 0-23..
52 __u32 irq; member in union:kvm_irq_level::__anon9169
239 __u32 irq; member in struct:kvm_interrupt
  /external/qemu/android/config/linux-x86_64/linux/
kvm.h 47 * ACPI gsi notion of irq.
48 * For IA-64 (APIC model) IOAPIC0: irq 0-23; IOAPIC1: irq 24-47..
49 * For X86 (standard AT mode) PIC0/1: irq 0-15. IOAPIC0: 0-23..
52 __u32 irq; member in union:kvm_irq_level::__anon9191
239 __u32 irq; member in struct:kvm_interrupt
  /external/qemu/docs/
ANDROID-QEMU-PIPE.TXT 56 The device and driver use an I/O memory page and an IRQ to communicate.
61 - The device raises an IRQ to instruct the driver that certain events
177 The device can signal events to the driver by raising its IRQ.
  /external/kernel-headers/original/asm-x86/
genapic_32.h 40 int (*multi_timer_check)(int apic, int irq);

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