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  /prebuilt/ndk/android-ndk-r4/platforms/android-5/arch-x86/usr/include/asm/
ptrace.h 53 unsigned long r10; member in struct:pt_regs
  /prebuilt/ndk/android-ndk-r4/platforms/android-8/arch-x86/usr/include/asm/
ptrace-abi.h 47 #define R10 56
ptrace.h 53 unsigned long r10; member in struct:pt_regs
  /prebuilt/ndk/android-ndk-r6/platforms/android-9/arch-x86/usr/include/asm/
ptrace-abi.h 47 #define R10 56
ptrace.h 53 unsigned long r10; member in struct:pt_regs
  /frameworks/base/media/libstagefright/codecs/mp3dec/src/asm/
pvmp3_polyphase_filter_window_arm.s 55 mov r10,#1
65 add r2,r4,r10
67 sub r2,r4,r10
158 mov r2,r10,lsl r2
172 add r10,r10,#1
173 cmp r10,#0x10
  /external/libvpx/vp8/common/arm/armv6/
bilinearfilter_v6.asm 57 ldrb r10, [r0, #4]
65 pkhbt r9, r9, r10, lsl #16 ; src[4] | src[3]
165 ldrh r10, [r0, #8]
170 pkhtb r9, r8, r10 ; src[3] | src[4]
198 ldrneh r10, [r0, #8]
  /external/libvpx/vpx_scale/arm/neon/
vp8_vpxyv12_extendframeborders_neon.asm 25 push {r4 - r10, lr}
143 mov r10, #2
238 subs r10, r10, #1
243 pop {r4 - r10, pc}
414 mov r10, #2
509 subs r10, r10, #1
514 pop {r4 - r10, pc}
  /external/llvm/lib/Target/XCore/
XCoreFrameLowering.cpp 170 // Save R10 to the stack.
172 storeToStack(MBB, MBBI, XCore::R10, FPSpillOffset + FrameSize*4, dl, TII);
173 // R10 is live-in. It is killed at the spill.
174 MBB.addLiveIn(XCore::R10);
179 MachineLocation CSSrc(XCore::R10);
183 unsigned FramePtr = XCore::R10;
224 unsigned FramePtr = XCore::R10;
247 // Restore R10
250 loadFromStack(MBB, MBBI, XCore::R10, FPSpillOffset, dl, TII);
  /external/zlib/contrib/gcc_gvmat64/
gvmat64.S 68 ; register used : rax,rbx,rcx,rdx,rsi,rdi,r8,r9,r10,r11,r12
176 ; rax, rcx, rdx, r8, r9, r10, and r11, which are scratch.
252 mov r10, window_ad
254 lea r13, [r10 + rbp]
283 lea rsi,[r10+r11]
404 cmp r12w, word ptr [r10 + r8]
418 lea rsi,[r8+r10]
505 lea rsi,[r10+r11]
526 lea rsi,[r10+rax]
  /external/openssl/crypto/aes/asm/
aes-x86_64.pl 600 mov %rsp,%r10
610 mov %r10,24(%rsp) # save real stack pointer
1008 { my ($tp10,$tp20,$tp40,$tp80,$acc0)=("%rax","%r8", "%r9", "%r10","%rbx");
1196 mov %rsp,%r10
1206 mov %r10,24(%rsp) # save real stack pointer
    [all...]
  /external/llvm/test/CodeGen/MBlaze/
cc.ll 104 ; CHECK: {{.* r3, r10, r0}}
207 ; CHECK: {{.* r10, .*, .*}}
219 ; CHECK: {{.* r10, .*, .*}}
232 ; CHECK: {{.* r10, .*, .*}}
246 ; CHECK: {{.* r10, .*, .*}}
261 ; CHECK: {{.* r10, .*, .*}}
  /external/zlib/contrib/masmx64/
inffasx64.asm 29 ; rax, rcx, rdx, r8, r-9, r10, and r11, which are scratch.
50 mov r10, [rsp+48] ; /* r10 = end */
62 cmp r10, rdi
83 cmp r10, rdi
391 ; "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
  /external/libvpx/vp8/encoder/ppc/
variance_subpixel_altivec.asm 25 load_c \V0, vfilter_b, r6, r12, r10
28 lvx \V1, r6, r10
36 li r10, 16
66 ;# r10 16
87 lvx v22, r10, r3
175 lvx v22, r10, \R
248 li r10, 16
353 li r10, 16
487 li r10, 16
546 ;# r10 1
    [all...]
  /bionic/libc/kernel/arch-sh/asm/
system_32.h 20 #define switch_to(prev, next, last) do { register u32 *__ts1 __asm__ ("r1") = (u32 *)&prev->thread.sp; register u32 *__ts2 __asm__ ("r2") = (u32 *)&prev->thread.pc; register u32 *__ts4 __asm__ ("r4") = (u32 *)prev; register u32 *__ts5 __asm__ ("r5") = (u32 *)next; register u32 *__ts6 __asm__ ("r6") = (u32 *)&next->thread.sp; register u32 __ts7 __asm__ ("r7") = next->thread.pc; struct task_struct *__last; __asm__ __volatile__ ( ".balign 4\n\t" "stc.l gbr, @-r15\n\t" "sts.l pr, @-r15\n\t" "mov.l r8, @-r15\n\t" "mov.l r9, @-r15\n\t" "mov.l r10, @-r15\n\t" "mov.l r11, @-r15\n\t" "mov.l r12, @-r15\n\t" "mov.l r13, @-r15\n\t" "mov.l r14, @-r15\n\t" "mov.l r15, @r1\t! save SP\n\t" "mov.l @r6, r15\t! change to new stack\n\t" "mova 1f, %0\n\t" "mov.l %0, @r2\t! save PC\n\t" "mov.l 2f, %0\n\t" "jmp @%0\t! call __switch_to\n\t" " lds r7, pr\t! with return to new PC\n\t" ".balign 4\n" "2:\n\t" ".long __switch_to\n" "1:\n\t" "mov.l @r15+, r14\n\t" "mov.l @r15+, r13\n\t" "mov.l @r15+, r12\n\t" "mov.l @r15+, r11\n\t" "mov.l @r15+, r10\n\t" "mov.l @r15+, r9\n\t" "mov.l @r15+, r8\n\t" "lds.l @r15+, pr\n\t" "ldc.l @r15+, gbr\n\t" : "=z" (__last) : "r" (__ts1), "r" (__ts2), "r" (__ts4), "r" (__ts5), "r" (__ts6), "r" (__ts7) : "r3", "t"); last = __last; } while (0)
  /dalvik/vm/mterp/armv5te/
OP_CHECK_CAST_JUMBO.S 38 mov r10, r1 @ avoid ClassObject getting clobbered
46 mov r1, r10 @ r1<- desired class
  /external/clang/test/CXX/except/except.spec/
p3.cpp 45 extern void (*r10)() noexcept;
46 extern void (*r10)() noexcept;
  /external/llvm/test/CodeGen/X86/
2009-12-11-TLSNoRedZone.ll 55 %r10 = load %test** %p, align 8 ; <%test*> [#uses=1]
56 %r11 = ptrtoint %test* %r10 to i64 ; <i64> [#uses=1]
  /external/llvm/test/Transforms/SimplifyLibCalls/
SPrintF.ll 38 %r10 = add i32 %r9, %r4.1 ; <i32> [#uses=1]
39 ret i32 %r10
  /external/llvm/lib/Target/SystemZ/
SystemZRegisterInfo.td 74 def R10W : GPR32<10, "r10">;
92 def R10D : GPR64<10, "r10", [R10W]>, DwarfRegNum<[10]>;
107 def R10P : GPR64<10, "r10", [R10W, R11W], [R10D, R11D]>;
119 def R10Q : GPR128<10, "r10", [R10D, R11D], [R10P]>;
  /external/llvm/test/MC/Disassembler/ARM/
thumb-tests.txt 18 # CHECK: bfi r2, r10, #0, #1
64 # CHECK: pop.w {r2, r4, r6, r8, r10, r12}
67 # CHECK: push.w {r2, r4, r6, r8, r10, r12}
236 # CHECK: lsr.w r10, r0, #32
  /external/valgrind/main/docs/internals/
register-uses.txt 44 r10 n ?
71 r10 n int#8 y
114 r10 y avail
145 r10 n int#8 y
  /external/llvm/test/MC/Disassembler/MBlaze/
mblaze_operands.txt 37 # CHECK: add r10, r10, r10
  /external/valgrind/main/coregrind/m_syswrap/
syscall-amd64-darwin.S 107 movq -40(%rbp), %r10 // sigsetSzB in r10 not rcx
121 movq OFFSET_amd64_RCX(%r11), %r10 /* rcx is passed in r10 instead */
172 movq %r8, %r10 // sigsetSzB
  /frameworks/base/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/
Filt_6k_7k_neon.s 52 LDR r10, Lable1 @ get fir_7k address
83 @ not use registers: r4, r10, r12, r14, r5
87 @ r4 --- x[i], r10 ---- fir_6k_7k
88 VLD1.S16 {Q0, Q1}, [r10]! @fir_6k_7k[0] ~ fir_6k_7k[15]
89 VLD1.S16 {Q2, Q3}, [r10]! @fir_6k_7k[16] ~ fir_6k_7k[31]

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