| /frameworks/base/media/libstagefright/codecs/on2/h264dec/source/arm11_asm/ |
| h264bsd_interpolate_hor_half.s | 242 SBC mb, mb, tmp3, LSR #20 ;// -(partWidth-1)-1
243 SBC ref, ref, tmp3, LSR #20 ;// -(partWidth-1)-1
|
| h264bsd_interpolate_hor_quarter.s | 264 SBC mb, mb, tmp3, LSR #20 ;// -(partWidth-1)-1
265 SBC ref, ref, tmp3, LSR #20 ;// -(partWidth-1)-1
|
| h264bsd_interpolate_mid_hor.s | 156 SBC ref, ref, tmp3, LSR #16 ;// -(partWidth-1)-1
|
| /system/core/libpixelflinger/codeflinger/ |
| GGLAssembler.cpp | 430 ADD(AL, 0, Rs, Rs, reg_imm(parts.count.reg, LSR, 16));
553 MOV(AL, 0, fragment.reg, reg_imm(incoming.reg, LSR, incoming.l));
573 reg_imm(mAlphaSource.reg, LSR, shift));
582 reg_imm(fragment.reg, LSR, shift));
702 if (shift) CMP(AL, fragment.reg, reg_imm(ref, LSR, shift));
766 SUB(AL, 0, zbase, zbase, reg_imm(parts.count.reg, LSR, 15));
771 CMP(AL, depth, reg_imm(z, LSR, 16));
779 MOV(AL, 0, depth, reg_imm(z, LSR, 16));
[all...] |
| ARMAssemblerInterface.h | 43 LSL, LSR, ASR, ROR
|
| /external/tremolo/Tremolo/ |
| bitwiseARM.s | 57 MOV r10,r10,LSR r14 @ r10= ptr[0]>>(32-bitsLeftInWord)
81 MOV r10,r10,LSR r14 @ r10= first bitsLeftInWord bits
155 ADD r6,r10,r10,LSR #3 @ r6 = pointer to data
248 MOV r10,r10,LSR r14 @ r10= ptr[0]>>(32-bitsLeftInWord)
273 MOV r10,r10,LSR r14 @ r10= first bitsLeftInWord bits
395 ADD r6,r10,r10,LSR #3 @ r6 = pointer to data
|
| floor1ARM.s | 59 MOVS r6, r6, LSR #15
|
| mdctLARM.s | 264 MOV r0, r0, LSR #2 @ n >>= 2
420 MOV r0, r0, LSR #1 @ r0 = points>>i = POINTS
421 MOV r2, r14,LSR #2 @ r2 = (1<<i)-j (j=0)
993 LDRB r7, [r6, r4, LSR #6]
999 ADD r9, r1, r7, LSR r3 @ r9 = xx = x + (b>>shift)
1022 ADDGE r5, r5, r2, LSR #1 @ (step>>1)
1114 ADDGE r5, r5, r2, LSR #1 @ (step>>1)
|
| mdctARM.s | 261 MOV r0, r0, LSR #2 @ n >>= 2
431 MOV r0, r0, LSR #1 @ r0 = points>>i = POINTS
432 MOV r2, r14,LSR #2 @ r2 = (1<<i)-j (j=0)
998 LDRB r7, [r6, r4, LSR #6]
1004 MOV r7, r7, LSR r3
[all...] |
| /frameworks/base/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p2/src/ |
| omxVCM4P2_PredictReconCoefIntra_s.s | 185 LSR tempPred,tempPred,#15 ;// tempped=pPredBufRow(Col)[0]/dcScaler
186 LSR temp3,temp3,#1 ;// temp3=round(dcScaler/2)
|
| /external/sonivox/arm-hybrid-22k/lib_src/ |
| ARM-E_interpolate_loop_gnu.s | 116 ADD pPhaseAccum, pPhaseAccum, tmp2, LSR #(NUM_PHASE_FRAC_BITS - NEXT_INPUT_PCM_SHIFT)
|
| ARM-E_interpolate_noloop_gnu.s | 108 ADD pPhaseAccum, pPhaseAccum, tmp2, LSR #(NUM_PHASE_FRAC_BITS - NEXT_INPUT_PCM_SHIFT)
|
| /external/sonivox/arm-wt-22k/lib_src/ |
| ARM-E_interpolate_loop_gnu.s | 116 ADD pPhaseAccum, pPhaseAccum, tmp2, LSR #(NUM_PHASE_FRAC_BITS - NEXT_INPUT_PCM_SHIFT)
|
| ARM-E_interpolate_noloop_gnu.s | 108 ADD pPhaseAccum, pPhaseAccum, tmp2, LSR #(NUM_PHASE_FRAC_BITS - NEXT_INPUT_PCM_SHIFT)
|
| /external/v8/src/arm/ |
| debug-arm.cc | 174 __ mov(reg, Operand(reg, LSR, kSmiTagSize));
|
| stub-cache-arm.cc | [all...] |
| constants-arm.h | 289 LSR = 1 << 5, // Logical shift right.
|
| code-stubs-arm.cc | 362 Operand(source_, LSR, 32 - HeapNumber::kMantissaBitsInTopWord));
719 __ orr(dst2, dst2, Operand(scratch1, LSR, scratch2));
[all...] |
| ic-arm.cc | 147 __ and_(scratch2, scratch1, Operand(scratch2, LSR, String::kHashShift));
312 __ eor(t0, t0, Operand(t0, LSR, 12));
316 __ eor(t0, t0, Operand(t0, LSR, 4));
321 __ eor(t0, t0, Operand(t0, LSR, 16));
[all...] |
| macro-assembler-arm.cc | 315 mov(dst, Operand(dst, LSR, lsb), LeaveCC, cond);
[all...] |
| disasm-arm.cc | 204 "lsl", "lsr", "asr", "ror"
227 } else if (((shift == LSR) || (shift == ASR)) && (shift_amount == 0)) {
[all...] |
| /frameworks/base/media/libstagefright/codecs/on2/h264dec/source/arm_neon_asm/ |
| h264bsdWriteMacroblock.s | 103 LSR cwidth, width, #1
|
| /frameworks/base/media/libstagefright/codecs/on2/h264dec/source/arm_neon_asm_gcc/ |
| h264bsdWriteMacroblock.S | 105 LSR cwidth, width, #1
|
| /frameworks/base/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p10/src/ |
| omxVCM4P10_FilterDeblockingChroma_HorEdge_I_s.s | 158 MOVEQ filt, filt, LSR #16
|
| omxVCM4P10_PredictIntra_16x16_s.s | 224 ADD tVal2, tVal2, tVal2, LSR #16 ;// sum(pSrcAbove[0] to pSrcAbove[15])
|
