/external/llvm/include/llvm/CodeGen/ |
ScheduleDAG.h | 489 const TargetMachine &TM; // Target processor
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/external/llvm/lib/Target/ARM/ |
ARMBaseInstrInfo.h | 190 CreateTargetHazardRecognizer(const TargetMachine *TM,
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ARMISelLowering.h | 229 explicit ARMTargetLowering(TargetMachine &TM);
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ARMExpandPseudoInsts.cpp | [all...] |
ARMLoadStoreOptimizer.cpp | [all...] |
ARMISelDAGToDAG.cpp | 62 ARMBaseTargetMachine &TM; 70 explicit ARMDAGToDAGISel(ARMBaseTargetMachine &tm, 72 : SelectionDAGISel(tm, OptLevel), TM(tm), 73 TII(static_cast<const ARMBaseInstrInfo*>(TM.getInstrInfo())), 74 Subtarget(&TM.getSubtarget<ARMSubtarget>()) { [all...] |
ARMBaseInstrInfo.cpp | 94 CreateTargetHazardRecognizer(const TargetMachine *TM, 97 const InstrItineraryData *II = TM->getInstrItineraryData(); 100 return TargetInstrInfoImpl::CreateTargetHazardRecognizer(TM, DAG); [all...] |
ARMISelLowering.cpp | 79 const TargetMachine &TM, SmallVector<CCValAssign, 16> &locs, 81 : CCState(CC, isVarArg, MF, TM, locs, C) { 168 static TargetLoweringObjectFile *createTLOF(TargetMachine &TM) { 169 if (TM.getSubtarget<ARMSubtarget>().isTargetDarwin()) 175 ARMTargetLowering::ARMTargetLowering(TargetMachine &TM) 176 : TargetLowering(TM, createTLOF(TM)) { 177 Subtarget = &TM.getSubtarget<ARMSubtarget>(); 178 RegInfo = TM.getRegisterInfo(); 179 Itins = TM.getInstrItineraryData() [all...] |
/external/llvm/lib/Target/PTX/ |
PTXInstrInfo.cpp | 32 RI(_TM, *this), TM(_TM) {}
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/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.h | 240 explicit PPCTargetLowering(PPCTargetMachine &TM);
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/external/llvm/lib/Target/X86/ |
X86InstrInfo.h | 618 X86TargetMachine &TM; 634 explicit X86InstrInfo(X86TargetMachine &tm); [all...] |
X86MCInstLower.cpp | 34 : Ctx(mf.getContext()), Mang(mang), MF(mf), TM(mf.getTarget()), 35 MAI(*TM.getMCAsmInfo()), AsmPrinter(asmprinter) {}
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X86AsmPrinter.cpp | 653 const TargetData *TD = TM.getTargetData();
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X86ISelLowering.h | 481 explicit X86TargetLowering(X86TargetMachine &TM); [all...] |
X86ISelLowering.cpp | 190 static TargetLoweringObjectFile *createTLOF(X86TargetMachine &TM) { 191 const X86Subtarget *Subtarget = &TM.getSubtarget<X86Subtarget>(); 202 return new X8664_ELFTargetObjectFile(TM); 203 return new X8632_ELFTargetObjectFile(TM); 210 X86TargetLowering::X86TargetLowering(X86TargetMachine &TM) 211 : TargetLowering(TM, createTLOF(TM)) { 212 Subtarget = &TM.getSubtarget<X86Subtarget>(); 217 RegInfo = TM.getRegisterInfo(); [all...] |
/external/llvm/lib/CodeGen/ |
LiveDebugVariables.cpp | 314 void UserValue::print(raw_ostream &OS, const TargetMachine *TM) { 328 locations[i].print(OS, TM); [all...] |
ScheduleDAGInstrs.cpp | 209 const TargetSubtargetInfo &ST = TM.getSubtarget<TargetSubtargetInfo>();
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/external/llvm/lib/ExecutionEngine/JIT/ |
JITEmitter.cpp | 366 JITEmitter(JIT &jit, JITMemoryManager *JMM, TargetMachine &TM) 379 DR.reset(new JITDebugRegisterer(TM)); [all...] |
/external/llvm/lib/Target/Blackfin/ |
BlackfinISelLowering.cpp | 42 BlackfinTargetLowering::BlackfinTargetLowering(TargetMachine &TM) 43 : TargetLowering(TM, new TargetLoweringObjectFileELF()) {
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/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | 689 SparcTargetLowering::SparcTargetLowering(TargetMachine &TM) 690 : TargetLowering(TM, new TargetLoweringObjectFileELF()) { 800 if (TM.getSubtarget<SparcSubtarget>().isV9()) [all...] |
/external/llvm/lib/CodeGen/AsmPrinter/ |
DwarfDebug.cpp | 508 const TargetRegisterInfo *RI = Asm->TM.getRegisterInfo(); 713 const TargetRegisterInfo *TRI = Asm->TM.getRegisterInfo(); 717 const TargetFrameLowering *TFI = Asm->TM.getFrameLowering(); 761 const TargetFrameLowering *TFI = Asm->TM.getFrameLowering(); [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.cpp | 66 TM(XTM), 287 const TargetData *TD = TM.getTargetData(); [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
ScheduleDAGSDNodes.cpp | 382 const TargetSubtargetInfo &ST = TM.getSubtarget<TargetSubtargetInfo>();
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TargetLowering.cpp | 544 TargetLowering::TargetLowering(const TargetMachine &tm, 546 : TM(tm), TD(TM.getTargetData()), TLOF(*tlof), [all...] |
/external/llvm/lib/Target/Mips/ |
MipsISelLowering.cpp | 70 MipsTargetLowering(MipsTargetMachine &TM) 71 : TargetLowering(TM, new MipsTargetObjectFile()) { 72 Subtarget = &TM.getSubtarget<MipsSubtarget>(); [all...] |