| /dalvik/vm/mterp/armv5te/ |
| ALT_OP_DISPATCH_FF.S | 7 mov ip, rINST, lsr #8 @ ip<- extended opcode
|
| OP_DISPATCH_FF.S | 2 mov ip, rINST, lsr #8 @ ip<- extended opcode
|
| OP_IPUT_OBJECT_QUICK.S | 5 mov r2, rINST, lsr #12 @ r2<- B
9 mov r2, rINST, lsr #8 @ r2<- A(+)
14 FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
18 GET_INST_OPCODE(ip) @ extract opcode from rINST
|
| OP_IPUT_WIDE_QUICK.S | 4 mov r0, rINST, lsr #8 @ r0<- A(+)
5 mov r1, rINST, lsr #12 @ r1<- B
13 FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
15 GET_INST_OPCODE(ip) @ extract opcode from rINST
|
| OP_NEW_ARRAY.S | 12 mov r0, rINST, lsr #12 @ r0<- B
55 mov r2, rINST, lsr #8 @ r2<- A+
57 FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
59 GET_INST_OPCODE(ip) @ extract opcode from rINST
|
| OP_PACKED_SWITCH.S | 18 mov r3, rINST, lsr #8 @ r3<- AA
27 FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
32 FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
34 GET_INST_OPCODE(ip) @ extract opcode from rINST
|
| OP_RETURN.S | 9 mov r2, rINST, lsr #8 @ r2<- AA
|
| bincmp.S | 11 mov r0, rINST, lsr #8 @ r0<- A+
12 mov r1, rINST, lsr #12 @ r1<- B
20 FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
29 GET_INST_OPCODE(ip) @ extract opcode from rINST
|
| binopWide2addr.S | 17 mov r9, rINST, lsr #8 @ r9<- A+
18 mov r1, rINST, lsr #12 @ r1<- B
28 FETCH_ADVANCE_INST(1) @ advance rPC, load rINST
32 GET_INST_OPCODE(ip) @ extract opcode from rINST
|
| OP_GOTO_16.S | 12 FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
18 GET_INST_OPCODE(ip) @ extract opcode from rINST
|
| OP_MOVE_WIDE_16.S | 9 FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
10 GET_INST_OPCODE(ip) @ extract opcode from rINST
|
| /dalvik/vm/mterp/armv6t2/ |
| bincmp.S | 11 mov r1, rINST, lsr #12 @ r1<- B
12 ubfx r0, rINST, #8, #4 @ r0<- A
19 FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
28 GET_INST_OPCODE(ip) @ extract opcode from rINST
|
| binopWide2addr.S | 17 mov r1, rINST, lsr #12 @ r1<- B
18 ubfx r9, rINST, #8, #4 @ r9<- A
27 FETCH_ADVANCE_INST(1) @ advance rPC, load rINST
31 GET_INST_OPCODE(ip) @ extract opcode from rINST
|
| /dalvik/vm/mterp/x86/ |
| OP_BREAKPOINT.S | 16 movzbl 1(rPC),rINST
|
| OP_MOVE_EXCEPTION.S | 5 SET_VREG %eax rINST # fp[AA]<- exception object
|
| OP_MOVE_RESULT.S | 8 SET_VREG %eax rINST # fp[AA]<- retval.l
|
| binopLit8.S | 17 SET_VREG $result rINST
|
| OP_CHECK_CAST.S | 13 GET_VREG_R rINST,rINST # rINST<- vAA (object)
16 testl rINST,rINST # is oject null?
20 movl offObject_clazz(rINST),%ecx # ecx<- obj->clazz
35 * rINST holds object
49 movl offObject_clazz(rINST),%eax
60 * rINST holds object
76 movl offObject_clazz(rINST),%ecx # ecx<- obj->claz
[all...] |
| OP_CHECK_CAST_JUMBO.S | 13 GET_VREG_R rINST,rINST # rINST<- vBBBB (object)
16 testl rINST,rINST # is oject null?
20 movl offObject_clazz(rINST),%ecx # ecx<- obj->clazz
35 * rINST holds object
49 movl offObject_clazz(rINST),%eax
60 * rINST holds object
76 movl offObject_clazz(rINST),%ecx # ecx<- obj->claz
[all...] |
| /dalvik/vm/mterp/x86-atom/ |
| OP_CMPL_FLOAT.S | 49 movl $$0xFFFFFFFF, (rFP, rINST, 4) # vAA<- less than
54 movl $$0x1, (rFP, rINST, 4) # vAA<- greater than
58 movl $$0x0, (rFP, rINST, 4) # vAA<- equal
62 movl $nan, (rFP, rINST, 4) # vAA<- NaN
|
| OP_CONST_16.S | 33 SET_VREG %edx rINST # vAA<- BBBB; literal
|
| OP_RETURN_WIDE.S | 32 movq (rFP, rINST, 4), %xmm0 # %xmm0<- vAA
|
| binopD.S | 48 SET_VREG %eax rINST # vAA<- %eax (quotient)
50 SET_VREG %edx rINST # vAA<- %edx (remainder)
56 movl $$0x80000000, (rFP, rINST, 4) # vAA<- min int
58 movl $$0, (rFP, rINST, 4) # vAA<- 0
|
| OP_INSTANCE_OF.S | 33 movl rINST, %edx # %edx<- BA
69 andl $$15, rINST # rINST<- A
72 SET_VREG %eax, rINST # vA<- r0
81 andl $$15, rINST # rINST<- A
82 SET_VREG %edx, rINST # vA<- r0
91 andl $$15, rINST # rINST<- A
92 SET_VREG $$1, rINST # vA<- r
[all...] |
| /dalvik/vm/compiler/template/armv5te/ |
| header.S | 65 r7 rINST first 16-bit code unit of current instruction
77 #define rINST r7
|
