| /dalvik/vm/mterp/x86/ |
| OP_MUL_INT_LIT16.S | 3 /* Need A in rINST, ssssCCCC in ecx, vB in eax */
8 andb $$0xf,rINSTbl # rINST<- A
14 SET_VREG %eax rINST
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| OP_SHR_LONG.S | 27 SET_VREG_WORD rIBASE rINST 1 # v[AA+1]<- rIBASE
30 SET_VREG_WORD %eax rINST 0 # v[AA+0]<- eax
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| bindivLit8.S | 18 SET_VREG $result rINST
27 SET_VREG $result rINST
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| binopWide.S | 13 SET_VREG_WORD rIBASE rINST 0 # v[AA+0] <- rIBASE
16 SET_VREG_WORD %eax rINST 1 # v[AA+1] <- eax
|
| OP_SPUT_WIDE.S | 19 GET_VREG_WORD %ecx rINST 0 # rINST<- lsw
20 GET_VREG_WORD rINST rINST 1 # ecx<- msw
23 movl rINST,4+offStaticField_value(%eax)
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| OP_SPUT_WIDE_JUMBO.S | 17 GET_VREG_WORD %ecx rINST 0 # ecx<- lsw
18 GET_VREG_WORD rINST rINST 1 # rINST<- msw
21 movl rINST,4+offStaticField_value(%eax)
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| OP_IPUT_OBJECT.S | 20 andb $$0xf,rINSTbl # rINST<- A
44 * rINST holds A
46 GET_VREG_R rINST rINST # rINST<- v[A]
50 movl rINST,(%ecx,%eax) # obj.field <- v[A](8/16/32 bits)
52 testl rINST,rINST # stored a NULL?
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| OP_CMP_LONG.S | 22 SET_VREG %ecx rINST
30 SET_VREG %ecx rINST
38 SET_VREG %ecx rINST
|
| OP_MUL_LONG_2ADDR.S | 7 * is used by imul. We'll also spill rINST (ebx),
16 sarl $$4,rINST # rINST<- B
21 leal (rFP,rINST,4),rFP # rFP<- &v[B]
|
| /dalvik/vm/mterp/x86-atom/ |
| OP_CONST_WIDE_16.S | 35 movl %edx, (rFP, rINST, 4) # vAA<- ssssBBBB
36 movl %ecx, 4(rFP, rINST, 4) # vAA+1<- ssssssss
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| OP_CONST_WIDE_32.S | 37 movl %edx, (rFP, rINST, 4) # vAA<- BBBBBBBB
38 movl %ecx, 4(rFP, rINST, 4) # vAA+1<- ssssssss
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| OP_INT_TO_LONG.S | 32 movl rINST, %eax # %eax<- BA+
33 movl rINST, %ecx # %ecx<- BA+
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| OP_IPUT_OBJECT.S | 64 movl rINST, %ecx # %ecx<- BA+
66 and $$15, rINST # rINST<- A
71 GET_VREG rINST # rINST<- vA
72 movl rINST, (%edx, %ecx) # object field<- vA
76 testl rINST, rINST # test if we stored a null value
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| OP_CMP_LONG.S | 46 movl $$0x0, (rFP, rINST, 4) # vAA<- equal
50 movl $$0xFFFFFFFF, (rFP, rINST, 4) # vAA<- less than
54 movl $$0x1, (rFP, rINST, 4) # vAA<- greater than
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| OP_PACKED_SWITCH.S | 39 GET_VREG rINST # rINST<- vAA
40 movl rINST, -4(%esp) # push parameter vAA
|
| header.S | 46 * %ebx rINST first 16-bit code unit of current instruction
62 #define rINST %ebx
144 * Fetch the next instruction from rPC into rINST. Does not advance rPC.
148 movzwl (rPC), rINST
162 movzwl (rPC), rINST
173 movzwl (rPC), rINST
271 movzbl 1(rPC), rINST
286 movzbl (\_count*2 + 1)(rPC), rINST
302 movzbl 1(\_reg, rPC), rINST
317 movzbl 1(rPC), rINST
[all...] |
| /dalvik/vm/mterp/armv5te/ |
| OP_CONST_CLASS.S | 8 mov r9, rINST, lsr #8 @ r9<- AA
13 FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
14 GET_INST_OPCODE(ip) @ extract opcode from rINST
32 FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
33 GET_INST_OPCODE(ip) @ extract opcode from rINST
|
| OP_CONST_STRING.S | 8 mov r9, rINST, lsr #8 @ r9<- AA
13 FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
14 GET_INST_OPCODE(ip) @ extract opcode from rINST
31 FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
32 GET_INST_OPCODE(ip) @ extract opcode from rINST
|
| OP_CONST_STRING_JUMBO.S | 9 mov r9, rINST, lsr #8 @ r9<- AA
15 FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
16 GET_INST_OPCODE(ip) @ extract opcode from rINST
33 FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
34 GET_INST_OPCODE(ip) @ extract opcode from rINST
|
| OP_EXECUTE_INLINE_RANGE.S | 23 mov r0, rINST, lsr #8 @ r0<- AA
29 FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
30 GET_INST_OPCODE(ip) @ extract opcode from rINST
73 mov r0, rINST, lsr #8 @ r0<- B
74 mov rINST, r9 @ rINST<- method
79 mov r0, rINST @ r0<- method
84 FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
85 GET_INST_OPCODE(ip) @ extract opcode from rINST
|
| OP_AGET.S | 13 mov r9, rINST, lsr #8 @ r9<- AA
23 FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
25 GET_INST_OPCODE(ip) @ extract opcode from rINST
|
| OP_APUT.S | 13 mov r9, rINST, lsr #8 @ r9<- AA
23 FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
25 GET_INST_OPCODE(ip) @ extract opcode from rINST
|
| binopWide.S | 19 mov r9, rINST, lsr #8 @ r9<- AA
31 FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
35 GET_INST_OPCODE(ip) @ extract opcode from rINST
|
| zcmp.S | 11 mov r0, rINST, lsr #8 @ r0<- AA
17 FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
26 GET_INST_OPCODE(ip) @ extract opcode from rINST
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| OP_CONST_CLASS_JUMBO.S | 15 FETCH_ADVANCE_INST(4) @ advance rPC, load rINST
16 GET_INST_OPCODE(ip) @ extract opcode from rINST
34 FETCH_ADVANCE_INST(4) @ advance rPC, load rINST
35 GET_INST_OPCODE(ip) @ extract opcode from rINST
|
