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  /external/llvm/lib/Target/Mips/
MipsISelLowering.h 64 FPRound,
MipsInstrFPU.td 43 def MipsFPRound : SDNode<"MipsISD::FPRound", SDTFPRoundOp, [SDNPOptInGlue]>;
MipsISelLowering.cpp 53 case MipsISD::FPRound: return "MipsISD::FPRound";
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  /external/valgrind/main/VEX/priv/
guest_amd64_helpers.c 1475 UInt fpround; local
1894 ULong fpround; local
    [all...]
guest_x86_helpers.c 1577 UInt fpround; local
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guest_x86_defs.h 115 extern UInt x86g_create_fpucw ( UInt fpround );
guest_amd64_defs.h 115 extern ULong amd64g_create_fpucw ( ULong fpround );
guest_amd64_toIR.c     [all...]
guest_ppc_toIR.c     [all...]
guest_x86_toIR.c     [all...]
  /external/valgrind/main/VEX/pub/
libvex_guest_x86.h 94 FPROUND[1:0] is the FPU's notional rounding mode, encoded as per
  /external/valgrind/main/memcheck/
mc_machine.c 190 if (o == GOF(FPROUND) && sz == 4) return -1;
348 if (o == GOF(FPROUND) && sz == 4) return -1;
519 if (o == GOF(FPROUND) && szB == 8) return -1;
631 if (o == GOF(FPROUND) && szB == 4) return -1;
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  /external/valgrind/main/exp-ptrcheck/
h_main.c     [all...]
  /external/llvm/lib/Target/X86/
X86ISelDAGToDAG.cpp 466 // Lower fpround and fpextend nodes that target the FP stack to be store and
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