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    Searched full:getinstrpredicate (Results 1 - 9 of 9) sorted by null

  /external/llvm/lib/Target/ARM/
Thumb2InstrInfo.h 71 /// to llvm::getInstrPredicate except it returns AL for conditional branch
Thumb2InstrInfo.cpp 56 ARMCC::CondCodes CC = llvm::getInstrPredicate(Tail, PredReg);
400 if (Offset == 0 && getInstrPredicate(&MI, PredReg) == ARMCC::AL) {
572 ARMCC::CondCodes CC = llvm::getInstrPredicate(UseMI, PredReg);
588 ARMCC::CondCodes NCC = llvm::getInstrPredicate(NMI, PredReg);
609 return llvm::getInstrPredicate(MI, PredReg);
ARMLoadStoreOptimizer.cpp 527 llvm::getInstrPredicate(MI, MyPredReg) == Pred &&
550 llvm::getInstrPredicate(MI, MyPredReg) == Pred &&
688 ARMCC::CondCodes Pred = llvm::getInstrPredicate(MI, PredReg);
843 ARMCC::CondCodes Pred = llvm::getInstrPredicate(MI, PredReg);
    [all...]
Thumb2SizeReduction.cpp 533 if (getInstrPredicate(MI, PredReg) == ARMCC::AL) {
610 ARMCC::CondCodes Pred = getInstrPredicate(MI, PredReg);
701 ARMCC::CondCodes Pred = getInstrPredicate(MI, PredReg);
ARMBaseInstrInfo.h 460 /// getInstrPredicate - If instruction is predicated, returns its predicate
463 ARMCC::CondCodes getInstrPredicate(const MachineInstr *MI, unsigned &PredReg);
Thumb1RegisterInfo.cpp 417 if (Offset == 0 && getInstrPredicate(&MI, PredReg) == ARMCC::AL) {
ARMBaseInstrInfo.cpp     [all...]
ARMConstantIslandPass.cpp     [all...]
ARMExpandPseudoInsts.cpp 643 ARMCC::CondCodes Pred = llvm::getInstrPredicate(&MI, PredReg);
    [all...]

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