| /external/valgrind/main/VEX/priv/ |
| host_ppc_defs.h | 45 /* The usual HReg abstraction. There are 32 real int regs,
49 extern void ppHRegPPC ( HReg );
51 extern HReg hregPPC_GPR0 ( Bool mode64 ); // scratch reg / zero reg
52 extern HReg hregPPC_GPR1 ( Bool mode64 ); // Stack Frame Pointer
53 extern HReg hregPPC_GPR2 ( Bool mode64 ); // not used: TOC pointer
54 extern HReg hregPPC_GPR3 ( Bool mode64 );
55 extern HReg hregPPC_GPR4 ( Bool mode64 );
56 extern HReg hregPPC_GPR5 ( Bool mode64 );
57 extern HReg hregPPC_GPR6 ( Bool mode64 );
58 extern HReg hregPPC_GPR7 ( Bool mode64 )
[all...] |
| host_arm_defs.h | 39 /* The usual HReg abstraction.
43 extern void ppHRegARM ( HReg );
45 extern HReg hregARM_R0 ( void );
46 extern HReg hregARM_R1 ( void );
47 extern HReg hregARM_R2 ( void );
48 extern HReg hregARM_R3 ( void );
49 extern HReg hregARM_R4 ( void );
50 extern HReg hregARM_R5 ( void );
51 extern HReg hregARM_R6 ( void );
52 extern HReg hregARM_R7 ( void )
[all...] |
| host_amd64_defs.h | 42 /* The usual HReg abstraction. There are 16 real int regs, 6 real
46 extern void ppHRegAMD64 ( HReg );
48 extern HReg hregAMD64_RAX ( void );
49 extern HReg hregAMD64_RBX ( void );
50 extern HReg hregAMD64_RCX ( void );
51 extern HReg hregAMD64_RDX ( void );
52 extern HReg hregAMD64_RSP ( void );
53 extern HReg hregAMD64_RBP ( void );
54 extern HReg hregAMD64_RSI ( void );
55 extern HReg hregAMD64_RDI ( void )
[all...] |
| host_x86_defs.h | 42 /* The usual HReg abstraction. There are 8 real int regs,
46 extern void ppHRegX86 ( HReg );
48 extern HReg hregX86_EAX ( void );
49 extern HReg hregX86_EBX ( void );
50 extern HReg hregX86_ECX ( void );
51 extern HReg hregX86_EDX ( void );
52 extern HReg hregX86_ESP ( void );
53 extern HReg hregX86_EBP ( void );
54 extern HReg hregX86_ESI ( void );
55 extern HReg hregX86_EDI ( void )
[all...] |
| host_arm_isel.c | 75 - A mapping from IRTemp to HReg. This tells the insn selector
84 32-bit virtual HReg, which holds the high half
103 HReg* vregmap;
104 HReg* vregmapHI;
107 HReg savedLR;
117 static HReg lookupIRTemp ( ISelEnv* env, IRTemp tmp )
124 static void lookupIRTemp64 ( HReg* vrHI, HReg* vrLO, ISelEnv* env, IRTemp tmp )
150 static HReg newVRegI ( ISelEnv* env )
152 HReg reg = mkHReg(env->vreg_ctr, HRcInt32, True/*virtual reg*/)
5969 HReg hreg, hregHI; local
[all...] |
| host_ppc_isel.c | 216 - A mapping from IRTemp to HReg. This tells the insn selector
254 HReg* vregmap;
255 HReg* vregmapHI;
258 HReg savedLR;
276 static HReg lookupIRTemp ( ISelEnv* env, IRTemp tmp )
283 static void lookupIRTempPair ( HReg* vrHI, HReg* vrLO,
303 static HReg newVRegI ( ISelEnv* env )
305 HReg reg = mkHReg(env->vreg_ctr, HRcGPR(env->mode64),
311 static HReg newVRegF ( ISelEnv* env
4121 HReg hreg, hregHI; local
[all...] |
| host_amd64_isel.c | 103 - A mapping from IRTemp to HReg. This tells the insn selector
112 64-bit virtual HReg, which holds the high half
130 HReg* vregmap;
131 HReg* vregmapHI;
143 static HReg lookupIRTemp ( ISelEnv* env, IRTemp tmp )
150 static void lookupIRTemp128 ( HReg* vrHI, HReg* vrLO,
169 static HReg newVRegI ( ISelEnv* env )
171 HReg reg = mkHReg(env->vreg_ctr, HRcInt64, True/*virtual reg*/);
176 //.. static HReg newVRegF ( ISelEnv* env
4119 HReg hreg, hregHI; local
[all...] |
| host_x86_isel.c | 137 - A mapping from IRTemp to HReg. This tells the insn selector
146 32-bit virtual HReg, which holds the high half
162 HReg* vregmap;
163 HReg* vregmapHI;
175 static HReg lookupIRTemp ( ISelEnv* env, IRTemp tmp )
182 static void lookupIRTemp64 ( HReg* vrHI, HReg* vrLO, ISelEnv* env, IRTemp tmp )
200 static HReg newVRegI ( ISelEnv* env )
202 HReg reg = mkHReg(env->vreg_ctr, HRcInt32, True/*virtual reg*/);
207 static HReg newVRegF ( ISelEnv* env
4011 HReg hreg, hregHI; local
[all...] |
| host_ppc_defs.c | 47 void ppHRegPPC ( HReg reg )
95 HReg hregPPC_GPR0 ( Bool mode64 ) { return MkHRegGPR( 0, mode64); }
96 HReg hregPPC_GPR1 ( Bool mode64 ) { return MkHRegGPR( 1, mode64); }
97 HReg hregPPC_GPR2 ( Bool mode64 ) { return MkHRegGPR( 2, mode64); }
98 HReg hregPPC_GPR3 ( Bool mode64 ) { return MkHRegGPR( 3, mode64); }
99 HReg hregPPC_GPR4 ( Bool mode64 ) { return MkHRegGPR( 4, mode64); }
100 HReg hregPPC_GPR5 ( Bool mode64 ) { return MkHRegGPR( 5, mode64); }
101 HReg hregPPC_GPR6 ( Bool mode64 ) { return MkHRegGPR( 6, mode64); }
102 HReg hregPPC_GPR7 ( Bool mode64 ) { return MkHRegGPR( 7, mode64); }
103 HReg hregPPC_GPR8 ( Bool mode64 ) { return MkHRegGPR( 8, mode64);
[all...] |
| host_generic_regs.h | 71 typedef UInt HReg;
109 /* Print an HReg in a generic (non-target-specific) way. */
110 extern void ppHReg ( HReg );
113 static inline HReg mkHReg ( UInt regno, HRegClass rc, Bool virtual ) {
122 static inline HRegClass hregClass ( HReg r ) {
129 static inline UInt hregNumber ( HReg r ) {
133 static inline Bool hregIsVirtual ( HReg r ) {
140 #define INVALID_HREG ((HReg)0xFFFFFFFF)
160 HReg hreg[N_HREG_USAGE] member in struct:__anon11830
[all...] |
| main_main.c | 173 HReg* available_real_regs;
175 Bool (*isMove) ( HInstr*, HReg*, HReg* );
178 void (*genSpill) ( HInstr**, HInstr**, HReg, Int, Bool );
179 void (*genReload) ( HInstr**, HInstr**, HReg, Int, Bool );
180 HInstr* (*directReload) ( HInstr*, HReg, Short );
182 void (*ppReg) ( HReg );
240 isMove = (Bool(*)(HInstr*,HReg*,HReg*)) isMove_X86Instr;
244 genSpill = (void(*)(HInstr**,HInstr**,HReg,Int,Bool)
[all...] |
| host_generic_regs.c | 57 void ppHReg ( HReg r )
90 ppHReg(tab->hreg[i]);
101 void addHRegUse ( HRegUsage* tab, HRegMode mode, HReg reg )
106 if (tab->hreg[i] == reg)
111 tab->hreg[tab->n_used] = reg;
160 void addToHRegRemap ( HRegRemap* map, HReg orig, HReg replacement )
178 HReg lookupHRegRemap ( HRegRemap* map, HReg orig )
|
| host_arm_defs.c | 49 /* The usual HReg abstraction.
53 void ppHRegARM ( HReg reg ) {
87 HReg hregARM_R0 ( void ) { return mkHReg(0, HRcInt32, False); }
88 HReg hregARM_R1 ( void ) { return mkHReg(1, HRcInt32, False); }
89 HReg hregARM_R2 ( void ) { return mkHReg(2, HRcInt32, False); }
90 HReg hregARM_R3 ( void ) { return mkHReg(3, HRcInt32, False); }
91 HReg hregARM_R4 ( void ) { return mkHReg(4, HRcInt32, False); }
92 HReg hregARM_R5 ( void ) { return mkHReg(5, HRcInt32, False); }
93 HReg hregARM_R6 ( void ) { return mkHReg(6, HRcInt32, False); }
94 HReg hregARM_R7 ( void ) { return mkHReg(7, HRcInt32, False);
[all...] |
| host_x86_defs.c | 47 void ppHRegX86 ( HReg reg )
79 HReg hregX86_EAX ( void ) { return mkHReg(0, HRcInt32, False); }
80 HReg hregX86_ECX ( void ) { return mkHReg(1, HRcInt32, False); }
81 HReg hregX86_EDX ( void ) { return mkHReg(2, HRcInt32, False); }
82 HReg hregX86_EBX ( void ) { return mkHReg(3, HRcInt32, False); }
83 HReg hregX86_ESP ( void ) { return mkHReg(4, HRcInt32, False); }
84 HReg hregX86_EBP ( void ) { return mkHReg(5, HRcInt32, False); }
85 HReg hregX86_ESI ( void ) { return mkHReg(6, HRcInt32, False); }
86 HReg hregX86_EDI ( void ) { return mkHReg(7, HRcInt32, False); }
88 HReg hregX86_FAKE0 ( void ) { return mkHReg(0, HRcFlt64, False);
[all...] |
| host_amd64_defs.c | 47 void ppHRegAMD64 ( HReg reg )
80 static void ppHRegAMD64_lo32 ( HReg reg )
104 HReg hregAMD64_RAX ( void ) { return mkHReg( 0, HRcInt64, False); }
105 HReg hregAMD64_RCX ( void ) { return mkHReg( 1, HRcInt64, False); }
106 HReg hregAMD64_RDX ( void ) { return mkHReg( 2, HRcInt64, False); }
107 HReg hregAMD64_RBX ( void ) { return mkHReg( 3, HRcInt64, False); }
108 HReg hregAMD64_RSP ( void ) { return mkHReg( 4, HRcInt64, False); }
109 HReg hregAMD64_RBP ( void ) { return mkHReg( 5, HRcInt64, False); }
110 HReg hregAMD64_RSI ( void ) { return mkHReg( 6, HRcInt64, False); }
111 HReg hregAMD64_RDI ( void ) { return mkHReg( 7, HRcInt64, False);
[all...] |
| host_generic_reg_alloc2.c | 53 Note that state[].hreg is the same as the available real regs.
79 HReg rreg;
96 HReg rreg;
117 HReg vreg;
149 HReg r,
157 if (reg_usage.hreg[i] == r)
313 HReg* available_real_regs,
318 Bool (*isMove) ( HInstr*, HReg*, HReg* ),
333 void (*genSpill) ( HInstr**, HInstr**, HReg, Int, Bool )
[all...] |
| /external/llvm/lib/CodeGen/ |
| CalcSpillWeights.cpp | 62 unsigned sub, hreg, hsub; local
65 hreg = mi->getOperand(1).getReg();
69 hreg = mi->getOperand(0).getReg();
73 if (!hreg)
76 if (TargetRegisterInfo::isVirtualRegister(hreg))
77 return sub == hsub ? hreg : 0;
83 return rc->contains(hreg) ? hreg : 0;
85 // reg:sub should match the physreg hreg.
86 return tri.getMatchingSuperReg(hreg, sub, rc)
[all...] |
