/external/llvm/test/MC/MBlaze/ |
mblaze_memory.s | 9 # CHECK: lbu 12 lbu r1, r2, r3
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/external/llvm/test/MC/Disassembler/MBlaze/ |
mblaze_memory.txt | 7 # CHECK: lbu r1, r2, r3
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/external/v8/src/mips/ |
constants-mips.cc | 326 case LBU:
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disasm-mips.cc | 854 case LBU: 855 Format(instr, "lbu 'rt, 'imm16s('rs)");
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assembler-mips.cc | 1283 void Assembler::lbu(Register rd, const MemOperand& rs) { function in class:v8::internal::Assembler [all...] |
macro-assembler-mips.cc | [all...] |
constants-mips.h | 231 LBU = ((4 << 3) + 4) << kOpcodeShift,
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assembler-mips.h | 624 void lbu(Register rd, const MemOperand& rs); [all...] |
simulator-mips.cc | [all...] |
/external/llvm/lib/Target/MBlaze/Disassembler/ |
MBlazeDisassembler.cpp | 56 MBlaze::LBU, MBlaze::LHU, MBlaze::LW, UNSUPPORTED, //30,31,32,33 358 case 0x0: return MBlaze::LBU; 473 case MBlaze::LBU: return decodeLBU(insn);
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/external/llvm/lib/Target/Mips/ |
MipsInstrInfo.td | 523 def LBu : LoadM<0x24, "lbu", zextloadi8>; 733 def : Pat<(extloadi1 addr:$src), (LBu addr:$src)>; 734 def : Pat<(extloadi8 addr:$src), (LBu addr:$src)>; [all...] |
/external/webkit/Source/JavaScriptCore/assembler/ |
MacroAssemblerMIPS.h | 471 m_assembler.lbu(dest, address.base, address.offset); 476 lbu dest, (offset & 0xffff)(addrTemp) 480 m_assembler.lbu(dest, addrTempRegister, address.offset); [all...] |
MIPSAssembler.h | 413 void lbu(RegisterID rt, RegisterID rs, int offset) function in class:JSC::MIPSAssembler
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/external/llvm/lib/Target/MBlaze/ |
MBlazeInstrInfo.td | 445 def LBU : LoadM<0x30, 0x000, "lbu ">; [all...] |
/prebuilt/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/lib/gconv/ |
IBM1364.so | |
IBM933.so | |
/external/webkit/Source/JavaScriptCore/ |
ChangeLog-2010-05-24 | [all...] |