| /external/llvm/lib/CodeGen/ |
| ShrinkWrapping.cpp | 126 bool PEI::isReturnBlock(MachineBasicBlock* MBB) {
127 return (MBB && !MBB->empty() && MBB->back().getDesc().isReturn());
197 /// for the given MBB by looking forward in the MCFG at MBB's
200 bool PEI::calcAnticInOut(MachineBasicBlock* MBB) {
203 // AnticOut[MBB] = INTERSECT(AnticIn[S] for S in SUCCESSORS(MBB))
205 for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin()
[all...] |
| PHIEliminationUtils.cpp | 17 // findCopyInsertPoint - Find a safe place in MBB to insert a copy from SrcReg
22 llvm::findPHICopyInsertPoint(MachineBasicBlock* MBB, MachineBasicBlock* SuccMBB,
25 if (MBB->empty())
26 return MBB->begin();
32 return MBB->getFirstTerminator();
36 MachineRegisterInfo& MRI = MBB->getParent()->getRegInfo();
40 if (DefUseMI->getParent() == MBB)
47 InsertPoint = MBB->begin();
54 InsertPoint = MBB->end();
60 return MBB->SkipPHIsAndLabels(InsertPoint)
[all...] |
| MachineVerifier.cpp | 91 // Is this MBB reachable from the MF entry point?
98 // Regs killed in MBB. They may be defined again, and will then be in both
102 // Regs defined in MBB and live out. Note that vregs passing through may
106 // Vregs that pass through MBB untouched. This set is disjoint from
110 // Vregs that must pass through MBB because they are needed by a successor
169 // Extra register info per MBB.
183 void visitMachineBasicBlockBefore(const MachineBasicBlock *MBB);
187 void visitMachineBasicBlockAfter(const MachineBasicBlock *MBB);
191 void report(const char *msg, const MachineBasicBlock *MBB);
195 void markReachable(const MachineBasicBlock *MBB);
[all...] |
| BranchFolding.h | 43 void setBlock(MachineBasicBlock *MBB) {
44 Block = MBB;
79 void setBlock(MachineBasicBlock *MBB) {
80 getMergePotentialsElt().setBlock(MBB);
114 bool OptimizeBlock(MachineBasicBlock *MBB);
115 void RemoveDeadBlock(MachineBasicBlock *MBB);
116 bool OptimizeImpDefsBlock(MachineBasicBlock *MBB);
119 bool HoistCommonCodeInSuccs(MachineBasicBlock *MBB);
|
| BranchFolding.cpp | 11 // directly to the target block. This pass often results in dead MBB's, which
102 void BranchFolder::RemoveDeadBlock(MachineBasicBlock *MBB) {
103 assert(MBB->pred_empty() && "MBB must be dead!");
104 DEBUG(dbgs() << "\nRemoving MBB: " << *MBB);
106 MachineFunction *MF = MBB->getParent();
108 while (!MBB->succ_empty())
109 MBB->removeSuccessor(MBB->succ_end()-1)
[all...] |
| MachineBranchProbabilityInfo.cpp | 30 getSumForBlock(MachineBasicBlock *MBB) const {
33 for (MachineBasicBlock::const_succ_iterator I = MBB->succ_begin(),
34 E = MBB->succ_end(); I != E; ++I) {
36 uint32_t Weight = getEdgeWeight(MBB, Succ);
67 MachineBranchProbabilityInfo::getHotSucc(MachineBasicBlock *MBB) const {
72 for (MachineBasicBlock::const_succ_iterator I = MBB->succ_begin(),
73 E = MBB->succ_end(); I != E; ++I) {
75 uint32_t Weight = getEdgeWeight(MBB, Succ);
108 OS << "edge MBB#" << Src->getNumber() << " -> MBB#" << Dst->getNumber(
[all...] |
| PrologEpilogInserter.h | 115 bool calcAnticInOut(MachineBasicBlock* MBB);
116 bool calcAvailInOut(MachineBasicBlock* MBB);
118 bool addUsesForMEMERegion(MachineBasicBlock* MBB,
121 bool calcSpillPlacements(MachineBasicBlock* MBB,
124 bool calcRestorePlacements(MachineBasicBlock* MBB,
149 // Propgate CSRs used in MBB to all MBBs of loop LP.
150 void propagateUsesAroundLoop(MachineBasicBlock* MBB, MachineLoop* LP);
153 bool isReturnBlock(MachineBasicBlock* MBB);
164 std::string getBasicBlockName(const MachineBasicBlock* MBB);
167 void dumpUsed(MachineBasicBlock* MBB);
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430FrameLowering.cpp | 42 MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
48 MachineBasicBlock::iterator MBBI = MBB.begin();
49 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
66 BuildMI(MBB, MBBI, DL, TII.get(MSP430::PUSH16r))
70 BuildMI(MBB, MBBI, DL, TII.get(MSP430::MOV16rr), MSP430::FPW)
82 while (MBBI != MBB.end() && (MBBI->getOpcode() == MSP430::PUSH16r))
85 if (MBBI != MBB.end())
91 //NumBytes -= mergeSPUpdates(MBB, MBBI, true);
94 // mergeSPUpdatesDown(MBB, MBBI, &NumBytes);
98 BuildMI(MBB, MBBI, DL, TII.get(MSP430::SUB16ri), MSP430::SPW
[all...] |
| MSP430InstrInfo.cpp | 35 void MSP430InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
41 if (MI != MBB.end()) DL = MI->getDebugLoc();
42 MachineFunction &MF = *MBB.getParent();
53 BuildMI(MBB, MI, DL, get(MSP430::MOV16mr))
57 BuildMI(MBB, MI, DL, get(MSP430::MOV8mr))
64 void MSP430InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
70 if (MI != MBB.end()) DL = MI->getDebugLoc();
71 MachineFunction &MF = *MBB.getParent();
82 BuildMI(MBB, MI, DL, get(MSP430::MOV16rm))
85 BuildMI(MBB, MI, DL, get(MSP430::MOV8rm)
[all...] |
| MSP430BranchSelector.cpp | 61 // Measure each MBB and compute a size for the entire function.
65 MachineBasicBlock *MBB = MFI;
68 for (MachineBasicBlock::iterator MBBI = MBB->begin(), EE = MBB->end();
72 BlockSizes[MBB->getNumber()] = BlockSize;
88 // bCC MBB
91 // b MBB
101 MachineBasicBlock &MBB = *MFI;
103 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end()
[all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUInstrInfo.cpp | 124 void SPUInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
134 BuildMI(MBB, I, DL, get(SPU::LRr128), DestReg)
139 SPUInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
168 if (MI != MBB.end()) DL = MI->getDebugLoc();
169 addFrameReference(BuildMI(MBB, MI, DL, get(opc))
174 SPUInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
203 if (MI != MBB.end()) DL = MI->getDebugLoc();
204 addFrameReference(BuildMI(MBB, MI, DL, get(opc), DestReg), FrameIdx);
213 SPUInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
218 MachineBasicBlock::iterator I = MBB.end()
[all...] |
| /external/llvm/lib/Target/Blackfin/ |
| BlackfinInstrInfo.cpp | 79 InsertBranch(MachineBasicBlock &MBB,
92 BuildMI(&MBB, DL, get(BF::JUMPa)).addMBB(TBB);
100 void BlackfinInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
105 BuildMI(MBB, I, DL, get(BF::MOVE), DestReg)
111 BuildMI(MBB, I, DL, get(BF::SLL16i), DestReg)
119 BuildMI(MBB, I, DL, get(BF::MOVENCC_z), DestReg)
121 BuildMI(MBB, I, DL, get(BF::BITTGL), DestReg).addReg(DestReg).addImm(0);
125 BuildMI(MBB, I, DL, get(BF::MOVECC_zext), DestReg)
133 BuildMI(MBB, I, DL, get(BF::SETEQri_not), DestReg)
138 BuildMI(MBB, I, DL, get(BF::MOVECC_nz), DestReg
[all...] |
| BlackfinFrameLowering.cpp | 44 MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
45 MachineBasicBlock::iterator MBBI = MBB.begin();
52 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
63 RegInfo->adjustRegister(MBB, MBBI, dl, BF::SP, BF::P1, -FrameSize);
69 BuildMI(MBB, MBBI, dl, TII.get(BF::LINK)).addImm(FrameSize);
79 BuildMI(MBB, MBBI, dl, TII.get(BF::PUSH))
81 BuildMI(MBB, MBBI, dl, TII.get(BF::PUSH))
83 BuildMI(MBB, MBBI, dl, TII.get(BF::MOVE), BF::FP)
85 RegInfo->loadConstant(MBB, MBBI, dl, BF::P1, -FrameSize);
86 BuildMI(MBB, MBBI, dl, TII.get(BF::ADDpp), BF::SP
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcInstrInfo.cpp | 116 bool SparcInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
123 MachineBasicBlock::iterator I = MBB.end();
124 MachineBasicBlock::iterator UnCondBrIter = MBB.end();
125 while (I != MBB.begin()) {
148 while (llvm::next(I) != MBB.end())
154 if (MBB.isLayoutSuccessor(I->getOperand(0).getMBB())) {
157 I = MBB.end();
158 UnCondBrIter = MBB.end();
174 if (AllowModify && UnCondBrIter != MBB.end() &&
175 MBB.isLayoutSuccessor(TargetBB))
[all...] |
| DelaySlotFiller.cpp | 52 bool runOnMachineBasicBlock(MachineBasicBlock &MBB);
61 bool isDelayFiller(MachineBasicBlock &MBB,
80 findDelayInstr(MachineBasicBlock &MBB, MachineBasicBlock::iterator slot);
99 bool Filler::runOnMachineBasicBlock(MachineBasicBlock &MBB) {
102 for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ++I)
104 MachineBasicBlock::iterator D = MBB.end();
108 D = findDelayInstr(MBB, I);
113 if (D == MBB.end())
114 BuildMI(MBB, ++J, I->getDebugLoc(), TII->get(SP::NOP))
[all...] |
| /external/llvm/lib/Target/ARM/ |
| Thumb1InstrInfo.cpp | 35 void Thumb1InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
39 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tMOVr), DestReg)
46 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
58 if (I != MBB.end()) DL = I->getDebugLoc();
60 MachineFunction &MF = *MBB.getParent();
68 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tSTRspi))
75 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
87 if (I != MBB.end()) DL = I->getDebugLoc();
89 MachineFunction &MF = *MBB.getParent();
97 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tLDRspi), DestReg
[all...] |
| Thumb1FrameLowering.cpp | 38 emitSPUpdate(MachineBasicBlock &MBB,
43 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes, TII,
48 MachineBasicBlock &MBB = MF.front();
49 MachineBasicBlock::iterator MBBI = MBB.begin();
60 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
74 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -VARegSaveSize,
79 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes,
118 if (MBBI != MBB.end() && MBBI->getOpcode() == ARM::tPUSH) {
120 if (MBBI != MBB.end())
136 BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreFrameLowering.cpp | 45 static void loadFromStack(MachineBasicBlock &MBB,
55 BuildMI(MBB, I, dl, TII.get(Opcode), DstReg)
60 static void storeToStack(MachineBasicBlock &MBB,
70 BuildMI(MBB, I, dl, TII.get(Opcode))
91 MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
92 MachineBasicBlock::iterator MBBI = MBB.begin();
100 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
106 loadFromStack(MBB, MBBI, XCore::R11, 0, dl, TII);
129 MBB.addLiveIn(XCore::LR);
135 BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addImm(FrameSize)
[all...] |
| /external/llvm/lib/Target/Alpha/ |
| AlphaInstrInfo.cpp | 88 unsigned AlphaInstrInfo::InsertBranch(MachineBasicBlock &MBB,
100 BuildMI(&MBB, DL, get(Alpha::BR)).addMBB(TBB);
103 BuildMI(&MBB, DL, get(Alpha::COND_BRANCH_I))
106 BuildMI(&MBB, DL, get(Alpha::COND_BRANCH_F))
113 BuildMI(&MBB, DL, get(Alpha::COND_BRANCH_I))
116 BuildMI(&MBB, DL, get(Alpha::COND_BRANCH_F))
118 BuildMI(&MBB, DL, get(Alpha::BR)).addMBB(FBB);
122 void AlphaInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
127 BuildMI(MBB, MI, DL, get(Alpha::BISr), DestReg)
131 BuildMI(MBB, MI, DL, get(Alpha::CPYSS), DestReg
[all...] |
| AlphaFrameLowering.cpp | 47 MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
48 MachineBasicBlock::iterator MBBI = MBB.begin();
52 DebugLoc dl = (MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc());
56 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAHg), Alpha::R29)
58 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAg), Alpha::R29)
61 BuildMI(MBB, MBBI, dl, TII.get(Alpha::ALTENT))
82 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30).addImm(NumBytes)
85 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAH), Alpha::R30)
87 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30)
95 BuildMI(MBB, MBBI, dl, TII.get(Alpha::STQ)
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCBranchSelector.cpp | 62 // Measure each MBB and compute a size for the entire function.
66 MachineBasicBlock *MBB = MFI;
69 for (MachineBasicBlock::iterator MBBI = MBB->begin(), EE = MBB->end();
73 BlockSizes[MBB->getNumber()] = BlockSize;
89 // bCC MBB
92 // b MBB
102 MachineBasicBlock &MBB = *MFI;
104 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end()
[all...] |
| /external/llvm/lib/Target/PTX/ |
| PTXInstrInfo.cpp | 46 void PTXInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
53 MachineInstr *MI = BuildMI(MBB, I, DL, MCID, DstReg).
63 bool PTXInstrInfo::copyRegToReg(MachineBasicBlock &MBB,
75 MachineInstr *MI = BuildMI(MBB, I, DL, MCID, DstReg).addReg(SrcReg);
171 AnalyzeBranch(MachineBasicBlock &MBB,
178 if (MBB.empty())
181 MachineBasicBlock::const_iterator iter = MBB.end();
184 // for special case that MBB has only 1 instruction
185 const bool IsSizeOne = MBB.size() == 1;
193 DEBUG(dbgs() << "AnalyzeBranch: MBB: " << MBB.getName().str() << "\n")
[all...] |
| PTXInstrInfo.h | 40 virtual void copyPhysReg(MachineBasicBlock &MBB,
45 virtual bool copyRegToReg(MachineBasicBlock &MBB,
78 virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
83 virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
85 virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
102 virtual void storeRegToStackSlot(MachineBasicBlock& MBB,
107 virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
127 static bool IsAnySuccessorAlsoLayoutSuccessor(const MachineBasicBlock& MBB);
|