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  /external/llvm/test/CodeGen/X86/
vshift-5.ll 9 ; CHECK-NEXT: pslld
37 ; CHECK-NEXT: pslld
vec_shift4.ll 6 ; CHECK: pslld
vshift-1.ll 31 ; CHECK: pslld
41 ; CHECK-NEXT: pslld
vshift-4.ll 30 ; CHECK: pslld
40 ; CHECK: pslld
50 ; CHECK: pslld
x86-shifts.ll 9 ; CHECK: pslld
10 ; CHECK-NEXT: pslld
  /packages/apps/Camera/jni/feature_stab/db_vlvm/
db_feature_detection.cpp 286 pslld mm1,2 /*3 Shift dxx1*/
290 pslld mm2,1 /*6 Shift dxx2 1*/
292 pslld mm2,1 /*8 Shift dxx2 2*/
295 pslld mm3,2 /*11 Shift dxx3*/
298 pslld mm5,2 /*17 Shift dxy1*/
305 pslld mm6,1 /*20 Shift dxy2 1*/
307 pslld mm6,1 /*22 Shift dxy2 2*/
311 pslld mm7,2 /*25 Shift dxy3*/
315 pslld mm1,2 /*31 Shift dyy1*/
319 pslld mm2,1 /*34 Shift dyy2 1*
    [all...]
  /frameworks/compile/libbcc/runtime/lib/i386/
floatundisf.S 93 pslld $23, %xmm3
  /external/clang/test/CodeGen/
mmx-builtins.c 306 // CHECK: pslld
346 // CHECK: pslld
  /external/qemu/distrib/sdl-1.2.12/src/video/
mmx.h 587 #define pslld_i2r(imm, reg) mmx_i2r(pslld, imm, reg)
588 #define pslld_m2r(var, reg) mmx_m2r(pslld, var, reg)
589 #define pslld_r2r(regs, regd) mmx_r2r(pslld, regs, regd)
590 #define pslld(vars, vard) mmx_m2m(pslld, vars, vard) macro
  /external/qemu/distrib/sdl-1.2.12/src/hermes/
mmxp2_32.asm 146 pslld mm1, 2 ; 0 0 000000bb bbb00000
156 pslld mm2, 2 ; 0 0 000000bb bbb00000
  /external/valgrind/main/memcheck/tests/amd64/
sse_memory.stdout.exp     [all...]
sse_memory.c 351 TEST_INSN( &AllMask, 16,pslld)
  /external/valgrind/main/memcheck/tests/x86/
sse2_memory.stdout.exp     [all...]
sse_memory.c 351 TEST_INSN( &AllMask, 16,pslld)
  /external/libvpx/vp8/common/x86/
postproc_mmx.c 798 pslld mm3, 4
813 pslld mm4, 4
962 pslld xmm3, 4
977 pslld xmm4, 4
    [all...]
postproc_mmx.asm 365 pslld mm3, 4
380 pslld mm4, 4
postproc_sse2.asm 354 pslld xmm3, 4
369 pslld xmm4, 4
564 pslld xmm5, 4
  /external/valgrind/main/none/tests/amd64/
insn_mmx.def 72 pslld imm8[4] mm.ud[0x01234567,0x89abcdef] => 1.ud[0x12345670,0x9abcdef0]
73 pslld mm.uq[4] mm.ud[0x01234567,0x89abcdef] => 1.ud[0x12345670,0x9abcdef0]
74 pslld m64.uq[4] mm.ud[0x01234567,0x89abcdef] => 1.ud[0x12345670,0x9abcdef0]
insn_sse2.def 228 pslld imm8[4] xmm.ud[0x01234567,0x89abcdef,0x01234567,0x89abcdef] => 1.ud[0x12345670,0x9abcdef0,0x12345670,0x9abcdef0]
229 pslld xmm.uq[4,0] xmm.ud[0x01234567,0x89abcdef,0x01234567,0x89abcdef] => 1.ud[0x12345670,0x9abcdef0,0x12345670,0x9abcdef0]
230 pslld m128.uq[4,0] xmm.ud[0x01234567,0x89abcdef,0x01234567,0x89abcdef] => 1.ud[0x12345670,0x9abcdef0,0x12345670,0x9abcdef0]
    [all...]
  /external/valgrind/main/none/tests/x86/
insn_mmx.def 52 pslld imm8[4] mm.ud[0x01234567,0x89abcdef] => 1.ud[0x12345670,0x9abcdef0]
53 pslld mm.uq[4] mm.ud[0x01234567,0x89abcdef] => 1.ud[0x12345670,0x9abcdef0]
54 pslld m64.uq[4] mm.ud[0x01234567,0x89abcdef] => 1.ud[0x12345670,0x9abcdef0]
insn_sse2.def 228 pslld imm8[4] xmm.ud[0x01234567,0x89abcdef,0x01234567,0x89abcdef] => 1.ud[0x12345670,0x9abcdef0,0x12345670,0x9abcdef0]
229 pslld xmm.uq[4,0] xmm.ud[0x01234567,0x89abcdef,0x01234567,0x89abcdef] => 1.ud[0x12345670,0x9abcdef0,0x12345670,0x9abcdef0]
230 pslld m128.uq[4,0] xmm.ud[0x01234567,0x89abcdef,0x01234567,0x89abcdef] => 1.ud[0x12345670,0x9abcdef0,0x12345670,0x9abcdef0]
    [all...]
  /external/llvm/test/MC/X86/
x86-32-coverage.s 698 // CHECK: pslld %mm3, %mm3
699 pslld %mm3,%mm3
701 // CHECK: pslld %xmm5, %xmm5
702 pslld %xmm5,%xmm5
704 // CHECK: pslld $127, %mm3
705 pslld $0x7f,%mm3
707 // CHECK: pslld $127, %xmm5
708 pslld $0x7f,%xmm5
    [all...]
  /external/qemu/target-i386/
ops_sse_header.h 43 DEF_HELPER_2(glue(pslld, SUFFIX), void, Reg, Reg)
  /external/openssl/crypto/aes/asm/
aes-586.pl 735 &pslld ("mm3",8); &pslld ("mm7",8);
744 &pslld ("mm3",24); &pslld ("mm7",24);
    [all...]
  /external/llvm/lib/Target/X86/
README-SSE.txt 397 pslld %xmm0, %xmm1
403 pslld %xmm0, %xmm1
410 save, as a really-signed value would be undefined for pslld.
670 using shifts and adds, pslld and paddd here. And even on targets with SSE4.1,

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