| /external/llvm/lib/Target/ARM/ |
| ARMAddressingModes.h | 95 /// rotr32 - Rotate a 32-bit unsigned value right by a specified # bits.
97 static inline unsigned rotr32(unsigned Val, unsigned Amt) { function in namespace:llvm::ARM_AM
161 if ((rotr32(Imm, RotAmt) & ~255U) == 0)
169 if ((rotr32(Imm, RotAmt2) & ~255U) == 0)
190 if (rotr32(~255U, RotAmt) & Arg)
201 V = rotr32(~255U, getSOImmValRotate(V)) & V;
206 V = rotr32(~255U, getSOImmValRotate(V)) & V;
213 return rotr32(255U, getSOImmValRotate(V)) & V;
220 V = rotr32(~255U, getSOImmValRotate(V)) & V;
223 assert(V == (rotr32(255U, getSOImmValRotate(V)) & V))
[all...] |
| Thumb2InstrInfo.cpp | 250 ThisVal = ThisVal & ARM_AM::rotr32(0xff000000U, RotAmt);
267 ThisVal = ThisVal & ARM_AM::rotr32(0xff000000U, RotAmt);
449 unsigned ThisImmVal = Offset & ARM_AM::rotr32(0xff000000U, RotAmt);
|
| ARMBaseInstrInfo.cpp | [all...] |
| /external/llvm/test/CodeGen/PowerPC/ |
| rotl-2.ll | 15 define i32 @rotr32(i32 %A, i8 %Amt) nounwind {
|
| /external/chromium/crypto/third_party/nss/ |
| sha512.cc | 146 #define ROTR32(x,n) _lrotr(x,n)
149 #define ROTR32(x,n) ((x >> n) | (x << ((8 * sizeof x) - n)))
154 #define S0(x) (ROTR32(x, 2) ^ ROTR32(x,13) ^ ROTR32(x,22))
155 #define S1(x) (ROTR32(x, 6) ^ ROTR32(x,11) ^ ROTR32(x,25))
156 #define s0(x) (t1 = x, ROTR32(t1, 7) ^ ROTR32(t1,18) ^ SHR(t1, 3)
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| rotate.ll | 14 define i32 @rotr32(i32 %A, i8 %Amt) {
|
| /external/llvm/lib/Target/ARM/Disassembler/ |
| ARMDisassemblerCore.cpp | 855 MI.addOperand(MCOperand::CreateImm(ARM_AM::rotr32(Imm, 2*Rot)));
[all...] |
| ThumbDisassemblerCore.h | 274 return ARM_AM::rotr32(Val, Amt);
[all...] |
