Lines Matching full:live
17 // Register live intervals: Registers must be defined only once, and must be
96 // Vregs that must be live in because they are used without being
104 // Regs defined in MBB and live out. Note that vregs passing through may
105 // be live out without being mentioned here.
165 // Live-out registers are either in regsLiveOut or vregsPassed.
522 report("MBB live-in list contains non-physical register", MBB);
627 // Check Live Variables.
666 report("No live range at use", MO, MONum);
667 *OS << UseIdx << " is not live in " << LI << '\n';
672 report("Live range continues after kill flag", MO, MONum);
673 *OS << "Live range: " << LI << '\n';
676 report("Virtual register has no Live interval", MO, MONum);
688 // We don't know which virtual registers are live in, so only complain
690 // must be live in. PHI instructions are handled separately.
710 // Check LiveInts for a live range, but only for virtual registers.
724 report("No live range at def", MO, MONum);
725 *OS << DefIdx << " is not live in " << LI << '\n';
728 report("Virtual register has no Live interval", MO, MONum);
805 *OS << "Live stack: " << LI << '\n';
809 *OS << "Live stack: " << LI << '\n';
853 // can pass through an MBB live, but may not be live every time. It is assumed
856 // First push live-out regs to successors' vregsPassed. Remember the MBBs that
894 // First push live-in regs to predecessors' vregsRequired.
940 report("PHI operand is not live-out from predecessor",
993 << " must be live through the block.\n";
999 << " is not needed live through the block.\n";
1030 report("Valno not live at def and not marked unused", MF);
1040 report("Live range at def has different valno", MF);
1042 << " where valno #" << DefVNI->id << " is live in " << LI << '\n';
1103 assert(VNI && "Live range has no valno");
1106 report("Foreign valno in live range", MF);
1112 report("Live range valno is marked unused", MF);
1119 report("Bad start of live segment, no basic block", MF);
1126 report("Live segment must begin at MBB entry or valno def", MBB);
1135 report("Bad end of live segment, no basic block", MF);
1141 // The live segment is ending inside EndMBB
1145 report("Live segment doesn't end at a valid instruction", EndMBB);
1151 // A live range can end with either a redefinition, a kill flag on a
1164 report("Instruction killing live segment neither defines nor reads "
1172 // Now check all the basic blocks in this live segment.
1174 // Is this live range the beginning of a non-PHIDef VN?
1176 // Not live-in to any blocks.
1192 // Check that VNI is live-out of all predecessors.
1202 report("Register not marked live out of predecessor", *PI);
1203 *OS << "Valno #" << VNI->id << " live into BB#" << MFI->getNumber()
1204 << '@' << LiveInts->getMBBStartIdx(MFI) << ", not live at "
1210 report("Different value live out of predecessor", *PI);
1211 *OS << "Valno #" << PVNI->id << " live out of BB#"
1213 << "\nValno #" << VNI->id << " live into BB#" << MFI->getNumber()
1228 report("Multiple connected components in live interval", MF);
