Lines Matching refs:DestVT
133 SDValue EmitStackConvert(SDValue SrcOp, EVT SlotVT, EVT DestVT, DebugLoc dl);
139 SDValue ExpandLegalINT_TO_FP(bool isSigned, SDValue LegalOp, EVT DestVT,
141 SDValue PromoteLegalINT_TO_FP(SDValue LegalOp, EVT DestVT, bool isSigned,
143 SDValue PromoteLegalFP_TO_INT(SDValue LegalOp, EVT DestVT, bool isSigned,
1844 /// a load from the stack slot to DestVT, extending it if needed.
1848 EVT DestVT,
1862 unsigned DestSize = DestVT.getSizeInBits();
1863 Type *DestType = DestVT.getTypeForEVT(*DAG.getContext());
1867 // later than DestVT.
1881 return DAG.getLoad(DestVT, dl, Store, FIPtr, PtrInfo,
1885 return DAG.getExtLoad(ISD::EXTLOAD, dl, DestVT, Store, FIPtr,
2275 EVT DestVT,
2324 if (DestVT == MVT::f64) {
2327 } else if (DestVT.bitsLT(MVT::f64)) {
2328 Result = DAG.getNode(ISD::FP_ROUND, dl, DestVT, Sub,
2330 } else if (DestVT.bitsGT(MVT::f64)) {
2331 Result = DAG.getNode(ISD::FP_EXTEND, dl, DestVT, Sub);
2343 if (Op0.getValueType() == MVT::i64 && DestVT == MVT::f64) {
2365 if (Op0.getValueType() == MVT::i64 && DestVT == MVT::f32) {
2421 SDValue Tmp1 = DAG.getNode(ISD::SINT_TO_FP, dl, DestVT, Op0);
2450 if (DestVT == MVT::f32)
2456 LegalizeOp(DAG.getExtLoad(ISD::EXTLOAD, dl, DestVT,
2462 return DAG.getNode(ISD::FADD, dl, DestVT, Tmp1, FudgeInReg);
2471 EVT DestVT,
2502 return DAG.getNode(OpToUse, dl, DestVT,
2513 EVT DestVT,
2517 EVT NewOutTy = DestVT;
2545 return DAG.getNode(ISD::TRUNCATE, dl, DestVT, Operation);
