Lines Matching refs:Opcode
242 static int isSignedOp(ISD::CondCode Opcode) {
243 switch (Opcode) {
314 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
593 // Set the opcode to DELETED_NODE to help catch bugs when node
1449 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1450 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
2375 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2377 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2382 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2392 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2397 switch (Opcode) {
2411 Opcode==ISD::SINT_TO_FP,
2436 switch (Opcode) {
2459 Opcode==ISD::FP_TO_SINT,
2477 switch (Opcode) {
2621 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2626 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2629 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2639 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2645 switch (Opcode) {
2675 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2679 switch (Opcode) {
2740 if (Opcode == ISD::FADD) {
2749 } else if (Opcode == ISD::FSUB) {
2955 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2958 if (isCommutativeBinOp(Opcode)) {
2969 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2976 switch (Opcode) {
3012 if (isCommutativeBinOp(Opcode)) {
3015 switch (Opcode) {
3041 switch (Opcode) {
3091 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3096 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3099 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3109 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3113 switch (Opcode) {
3183 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3188 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3191 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3201 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3205 return getNode(Opcode, DL, VT, Ops, 4);
3208 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3212 return getNode(Opcode, DL, VT, Ops, 5);
3840 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3860 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO,
3864 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3870 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3879 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3885 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3893 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3908 if (Opcode != ISD::ATOMIC_STORE || Ordering > Monotonic)
3920 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
3924 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3930 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3931 Opcode == ISD::ATOMIC_LOAD_SUB ||
3932 Opcode == ISD::ATOMIC_LOAD_AND ||
3933 Opcode == ISD::ATOMIC_LOAD_OR ||
3934 Opcode == ISD::ATOMIC_LOAD_XOR ||
3935 Opcode == ISD::ATOMIC_LOAD_NAND ||
3936 Opcode == ISD::ATOMIC_LOAD_MIN ||
3937 Opcode == ISD::ATOMIC_LOAD_MAX ||
3938 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3939 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3940 Opcode == ISD::ATOMIC_SWAP ||
3941 Opcode == ISD::ATOMIC_STORE) &&
3946 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
3951 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3957 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3965 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3991 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO,
3995 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4001 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4007 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
4013 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4035 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
4041 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
4047 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4066 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
4070 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4073 assert((Opcode == ISD::INTRINSIC_VOID ||
4074 Opcode == ISD::INTRINSIC_W_CHAIN ||
4075 Opcode == ISD::PREFETCH ||
4076 (Opcode <= INT_MAX &&
4077 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4078 "Opcode is not a memory-accessing opcode!");
4084 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4091 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4095 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4398 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4401 case 0: return getNode(Opcode, DL, VT);
4402 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4403 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4404 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4411 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4414 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4417 case 0: return getNode(Opcode, DL, VT);
4418 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4419 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4420 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4424 switch (Opcode) {
4450 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4456 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4459 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4469 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4472 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4476 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4480 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4481 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4484 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4487 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4490 switch (Opcode) {
4499 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4506 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4516 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4522 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4524 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4526 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4529 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4534 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4536 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4538 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4541 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4551 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4552 return getNode(Opcode, DL, VTList, 0, 0);
4555 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4558 return getNode(Opcode, DL, VTList, Ops, 1);
4561 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4564 return getNode(Opcode, DL, VTList, Ops, 2);
4567 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4570 return getNode(Opcode, DL, VTList, Ops, 3);
4573 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4577 return getNode(Opcode, DL, VTList, Ops, 4);
4580 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4584 return getNode(Opcode, DL, VTList, Ops, 5);
4798 /// machine opcode.
4907 /// return type, opcode, and operands.
4910 /// node of the specified opcode and operands, it returns that node instead of
4998 /// with specified return type(s), MachineInstr opcode, and operands.
5001 /// node of the specified opcode and operands, it returns that node instead of
5004 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
5006 return getMachineNode(Opcode, dl, VTs, 0, 0);
5010 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
5013 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5017 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5021 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5025 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5029 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5033 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5036 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5040 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
5042 return getMachineNode(Opcode, dl, VTs, 0, 0);
5046 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5050 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5054 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5058 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5062 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5067 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5071 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5075 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5079 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5084 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5088 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5093 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5097 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5101 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5105 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
5109 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5113 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5117 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5121 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
5129 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
5136 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
5183 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5187 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
6610 } else { // Just the address. FIXME: also print the child's opcode.
