Lines Matching refs:getOpcode
1128 switch (Op.getOpcode()) {
1136 if (Op.getOpcode() == ISD::XOR &&
1143 SDValue New = DAG.getNode(Op.getOpcode(), dl, VT, Op.getOperand(0),
1187 SDValue X = DAG.getNode(Op.getOpcode(), dl, SmallVT,
1234 if (Op.getOpcode() != ISD::UNDEF)
1242 switch (Op.getOpcode()) {
1386 SDValue New = TLO.DAG.getNode(Op.getOpcode(), dl,VT, Op.getOperand(0),
1448 if (InOp.getOpcode() == ISD::SRL &&
1473 if (InOp.getNode()->getOpcode() == ISD::ANY_EXTEND) {
1513 if (InOp.getOpcode() == ISD::SHL &&
1727 switch (In.getOpcode()) {
1848 assert((Op.getOpcode() >= ISD::BUILTIN_OP_END ||
1849 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
1850 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
1851 Op.getOpcode() == ISD::INTRINSIC_VOID) &&
1862 assert((Op.getOpcode() >= ISD::BUILTIN_OP_END ||
1863 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
1864 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
1865 Op.getOpcode() == ISD::INTRINSIC_VOID) &&
1878 if (Val.getOpcode() == ISD::SHL)
1886 if (Val.getOpcode() == ISD::SRL)
1933 if (N0.getOpcode() == ISD::SRL && (C1 == 0 || C1 == 1) &&
1934 N0.getOperand(0).getOpcode() == ISD::CTLZ &&
1935 N0.getOperand(1).getOpcode() == ISD::Constant) {
1957 if (N0.hasOneUse() && N0.getOpcode() == ISD::TRUNCATE)
1960 if (CTPOP.hasOneUse() && CTPOP.getOpcode() == ISD::CTPOP &&
1984 if (N0->getOpcode() == ISD::ZERO_EXTEND) {
1988 } else if (N0->getOpcode() == ISD::AND) {
2019 N0.getOpcode() == ISD::AND && C1 == 0 &&
2074 if (N0.getOpcode() == ISD::ZERO_EXTEND) {
2121 } else if (N0.getOpcode() == ISD::SIGN_EXTEND_INREG &&
2154 if (N0.getOpcode() == ISD::SETCC &&
2166 if ((N0.getOpcode() == ISD::XOR ||
2167 (N0.getOpcode() == ISD::AND &&
2168 N0.getOperand(0).getOpcode() == ISD::XOR &&
2180 if (N0.getOpcode() == ISD::XOR)
2183 assert(N0.getOpcode() == ISD::AND &&
2184 N0.getOperand(0).getOpcode() == ISD::XOR);
2198 if (Op0.getOpcode() == ISD::TRUNCATE)
2201 if ((Op0.getOpcode() == ISD::XOR) &&
2202 Op0.getOperand(0).getOpcode() == ISD::SETCC &&
2203 Op0.getOperand(1).getOpcode() == ISD::SETCC) {
2208 } else if (Op0.getOpcode() == ISD::AND &&
2305 N0.getOpcode() == ISD::AND)
2412 if (N0.getOpcode() == ISD::ADD || N0.getOpcode() == ISD::SUB ||
2413 N0.getOpcode() == ISD::XOR) {
2415 if (N0.getOpcode() == N1.getOpcode()) {
2420 if (DAG.isCommutativeBinOp(N0.getOpcode())) {
2434 if (N0.getOpcode() == ISD::ADD && N0.getNode()->hasOneUse()) {
2442 if (N0.getOpcode() == ISD::XOR)
2456 if (N0.getOpcode() == ISD::SUB && N0.getNode()->hasOneUse()) {
2472 if (DAG.isCommutativeBinOp(N0.getOpcode()))
2476 assert(N0.getOpcode() == ISD::SUB && "Unexpected operation!");
2488 if (N1.getOpcode() == ISD::ADD || N1.getOpcode() == ISD::SUB ||
2489 N1.getOpcode() == ISD::XOR) {
2495 if (DAG.isCommutativeBinOp(N1.getOpcode())) {
2499 assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!");
2514 if (N0.getOpcode() == ISD::AND)
2522 if (N1.getOpcode() == ISD::AND)
2597 if (N->getOpcode() == ISD::ADD) {
2691 if (Op.getOpcode() == ISD::BasicBlock) {
2706 if (Op.getOpcode() == ISD::ADD) {
