Lines Matching full:bitvector
272 void AddAvailableRegsToLiveIn(MachineBasicBlock &MBB, BitVector &RegKills,
382 BitVector PhysRegsClobbered;
422 BitVector &RegKills,
440 BitVector &RegKills,
474 BitVector &RegKills,
519 const TargetRegisterInfo* TRI, BitVector &RegKills,
543 BitVector &RegKills,
627 BitVector &RegKills,
780 BitVector &RegKills,
871 BitVector &RegKills,
1024 BitVector &AllocatableRegs) {
1025 BitVector Defs(TRI->getNumRegs());
1026 BitVector Uses(TRI->getNumRegs());
1104 BitVector AllocatableRegs;
1126 BitVector &RegKills,
1132 BitVector &RegKills,
1138 BitVector &RegKills,
1148 BitVector &RegKills,
1151 void TransferDeadness(unsigned Reg, BitVector &RegKills,
1158 BitVector &RegKills,
1165 BitVector &RegKills,
1170 AvailableSpills &Spills, BitVector &RegKills,
1195 BitVector RegKills(TRI->getNumRegs());
1279 BitVector &RegKills,
1380 BitVector &RegKills,
1521 BitVector &RegKills,
1606 BitVector &RegKills,
1692 TransferDeadness(unsigned Reg, BitVector &RegKills,
1782 BitVector &RegKills,
1921 BitVector &RegKills,
2265 AvailableSpills &Spills, BitVector &RegKills,
