Lines Matching full:cpsr
493 // FIXME: This confuses implicit_def with optional CPSR def.
501 if (MO.isReg() && MO.getReg() == ARM::CPSR) {
1459 /// instruction is encoded with an 'S' bit is determined by the optional CPSR
1462 /// This will go away once we can teach tblgen how to set the optional CPSR def
1765 // Check that CPSR isn't set between the comparison instruction and the one we
1781 // This instruction modifies or uses CPSR after the one we want to
1783 if (MO.getReg() == ARM::CPSR)
1792 // Set the "zero" bit in CPSR.
1828 // Scan forward for the use of CPSR, if it's a conditional code requires
1830 // CPSR use (i.e. used in another block), then it's not safe to perform
1840 CPSR)
1846 // Condition code is after the operand before CPSR.
1866 // Toggle the optional operand to CPSR.
1867 MI->getOperand(5).setReg(ARM::CPSR);
2351 if (DefMO.getReg() == ARM::CPSR) {
2353 // fpscr -> cpsr stalls over 20 cycles on A8 (and earlier?)
2357 // CPSR set and branch can be paired in the same cycle.
2681 if (PredCost && MCID.hasImplicitDefOfPhysReg(ARM::CPSR))
2682 // When predicated, CPSR is an additional source operand for CPSR updating
