Lines Matching refs:DefIdx
2084 unsigned DefIdx, unsigned DefAlign) const {
2085 int RegNo = (int)(DefIdx+1) - DefMCID.getNumOperands() + 1;
2088 return ItinData->getOperandCycle(DefClass, DefIdx);
2125 unsigned DefIdx, unsigned DefAlign) const {
2126 int RegNo = (int)(DefIdx+1) - DefMCID.getNumOperands() + 1;
2129 return ItinData->getOperandCycle(DefClass, DefIdx);
2228 unsigned DefIdx, unsigned DefAlign,
2234 if (DefIdx < DefMCID.getNumDefs() && UseIdx < UseMCID.getNumOperands())
2235 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx);
2244 DefCycle = ItinData->getOperandCycle(DefClass, DefIdx);
2253 DefCycle = getVLDMDefCycle(ItinData, DefMCID, DefClass, DefIdx, DefAlign);
2274 DefCycle = getLDMDefCycle(ItinData, DefMCID, DefClass, DefIdx, DefAlign);
2323 // It's a variable_ops instruction so we can't use DefIdx here. Just use
2328 } else if (ItinData->hasPipelineForwarding(DefClass, DefIdx,
2339 const MachineInstr *DefMI, unsigned DefIdx,
2350 const MachineOperand &DefMO = DefMI->getOperand(DefIdx);
2366 int Latency = getOperandLatency(ItinData, DefMCID, DefIdx, DefAlign,
2497 SDNode *DefNode, unsigned DefIdx,
2511 int Latency = ItinData->getOperandCycle(DefMCID.getSchedClass(), DefIdx);
2525 int Latency = getOperandLatency(ItinData, DefMCID, DefIdx, DefAlign,
2711 const MachineInstr *DefMI, unsigned DefIdx,
2721 int Latency = getOperandLatency(ItinData, DefMI, DefIdx, UseMI, UseIdx);
2730 const MachineInstr *DefMI, unsigned DefIdx) const {
2737 int DefCycle = ItinData->getOperandCycle(DefClass, DefIdx);