Lines Matching refs:Offset
153 const MachineOperand &Offset = MI->getOperand(NumOps-3);
156 unsigned OffReg = Offset.getReg();
1067 int FrameIx, uint64_t Offset,
1071 .addFrameIndex(FrameIx).addImm(0).addImm(Offset).addMetadata(MDPtr);
1251 /// between the two addresses is the offset. It also returns the offsets by
1521 // We will handle these bits from offset, clear them.
1537 unsigned FrameReg, int &Offset,
1549 Offset += MI.getOperand(FrameRegIdx+1).getImm();
1550 if (Offset == 0) {
1555 Offset = 0;
1557 } else if (Offset < 0) {
1558 Offset = -Offset;
1563 // Common case: small offset, fits into instruction.
1564 if (ARM_AM::getSOImmVal(Offset) != -1) {
1567 MI.getOperand(FrameRegIdx+1).ChangeToImmediate(Offset);
1568 Offset = 0;
1574 unsigned RotAmt = ARM_AM::getSOImmValRotate(Offset);
1575 unsigned ThisImmVal = Offset & ARM_AM::rotr32(0xFF, RotAmt);
1577 // We will handle these bits from offset, clear them.
1578 Offset &= ~ThisImmVal;
1614 // Can't fold any offset even if it's zero.
1630 Offset += InstrOffs * Scale;
1631 assert((Offset & (Scale-1)) == 0 && "Can't encode this offset!");
1632 if (Offset < 0) {
1633 Offset = -Offset;
1637 // Attempt to fold address comp. if opcode has offset bits
1639 // Common case: small offset, fits into instruction.
1641 int ImmedOffset = Offset / Scale;
1643 if ((unsigned)Offset <= Mask * Scale) {
1648 // tricks for the offset value.
1656 Offset = 0;
1669 Offset &= ~(Mask*Scale);
1673 Offset = (isSub) ? -Offset : Offset;
1674 return Offset == 0;
