Lines Matching defs:Opcode
360 static const NEONLdStTableEntry *LookupNEONLdSt(unsigned Opcode) {
375 std::lower_bound(NEONLdStTable, NEONLdStTable + NumEntries, Opcode);
376 if (I != NEONLdStTable + NumEntries && I->PseudoOpc == Opcode)
646 unsigned Opcode = MI.getOpcode();
651 bool isCC = Opcode == ARM::MOVCCi32imm || Opcode == ARM::t2MOVCCi32imm;
656 (Opcode == ARM::MOVi32imm || Opcode == ARM::MOVCCi32imm)) {
680 if (Opcode == ARM::t2MOVi32imm || Opcode == ARM::t2MOVCCi32imm) {
718 unsigned Opcode = MI.getOpcode();
719 switch (Opcode) {
724 unsigned newOpc = Opcode == ARM::VMOVScc ? ARM::VMOVS : ARM::VMOVD;
862 .addImm(ARM_AM::getSORegOpc((Opcode == ARM::MOVsrl_flag ?
885 TII->get(Opcode == ARM::tTPsoft ? ARM::tBL : ARM::BL))
895 unsigned NewLdOpc = (Opcode == ARM::tLDRpci_pic)
926 bool isARM = (Opcode != ARM::t2MOV_ga_pcrel && Opcode!=ARM::t2MOV_ga_dyn);
927 bool isPIC = (Opcode != ARM::MOV_ga_dyn && Opcode != ARM::t2MOV_ga_dyn);
935 ? (Opcode == ARM::MOV_ga_pcrel_ldr ? ARM::PICLDR : ARM::PICADD)
958 if (Opcode == ARM::MOV_ga_pcrel_ldr)
1034 unsigned NewOpc = Opcode == ARM::VDUPfqf ? ARM::VDUPLN32q :
